break;
case 0x9:
instruction->type = ARM_RSB;
- mnemonic = "NEGS";
+ mnemonic = "RSBS";
instruction->info.data_proc.variant = 0 /*immediate*/;
instruction->info.data_proc.shifter_operand.immediate.immediate = 0;
instruction->info.data_proc.Rn = Rm;
if ((opcode & 0xf000) == 0xc000)
{ /* generic load/store multiple */
+ char *wback = "!";
+
if (L)
{
instruction->type = ARM_LDM;
mnemonic = "LDM";
+ if (opcode & (1 << Rn))
+ wback = "";
}
else
{
instruction->type = ARM_STM;
mnemonic = "STM";
}
- snprintf(ptr_name,7,"r%i!, ",Rn);
+ snprintf(ptr_name, sizeof ptr_name, "r%i%s, ", Rn, wback);
}
else
{ /* push/pop */
mnemonic = "TST";
one = true;
suffix = "";
- suffix2 = ".W";
rd = rn;
} else {
instruction->type = ARM_AND;
case 10:
instruction->type = ARM_ADC;
mnemonic = "ADC";
+ suffix2 = ".W";
break;
case 11:
instruction->type = ARM_SBC;
bool add = false;
bool is_signed = false;
- immed = (opcode & 0x0ff) | ((opcode & 0x7000) >> 12);
- if (opcode & (1 << 27))
+ immed = (opcode & 0x0ff) | ((opcode & 0x7000) >> 4);
+ if (opcode & (1 << 26))
immed |= (1 << 11);
switch ((opcode >> 20) & 0x1f) {
add = true;
goto do_adr;
}
- mnemonic = "ADD.W";
+ mnemonic = "ADDW";
break;
case 4:
- mnemonic = "MOV.W";
- break;
+ immed |= (opcode >> 4) & 0xf000;
+ sprintf(cp, "MOVW\tr%d, #%d\t; %#3.3x", rd, immed, immed);
+ return ERROR_OK;
case 0x0a:
if (rn == 0xf)
goto do_adr;
- mnemonic = "SUB.W";
+ mnemonic = "SUBW";
break;
case 0x0c:
/* move constant to top 16 bits of register */
immed |= (opcode >> 10) & 0x1c;
sprintf(cp, "%sSAT\tr%d, #%d, r%d, %s #%d\t",
is_signed ? "S" : "U",
- rd, (int) (opcode & 0x1f) + 1, rn,
+ rd, (int) (opcode & 0x1f) + is_signed, rn,
(opcode & (1 << 21)) ? "ASR" : "LSL",
immed ? immed : 32);
return ERROR_OK;
switch (op) {
case 2:
- sprintf(cp, "STMB\tr%d%s, ", rn, t ? "!" : "");
+ sprintf(cp, "STM.W\tr%d%s, ", rn, t ? "!" : "");
break;
case 3:
if (rn == 13 && t)
- sprintf(cp, "POP\t");
+ sprintf(cp, "POP.W\t");
else
sprintf(cp, "LDM.W\tr%d%s, ", rn, t ? "!" : "");
break;
case 4:
if (rn == 13 && t)
- sprintf(cp, "PUSH\t");
+ sprintf(cp, "PUSH.W\t");
else
- sprintf(cp, "STM.W\tr%d%s, ", rn, t ? "!" : "");
+ sprintf(cp, "STMDB\tr%d%s, ", rn, t ? "!" : "");
break;
case 5:
- sprintf(cp, "LDMB\tr%d%s, ", rn, t ? "!" : "");
+ sprintf(cp, "LDMDB.W\tr%d%s, ", rn, t ? "!" : "");
break;
default:
return ERROR_INVALID_ARGUMENTS;
if (rn == 0xf) {
immed = opcode & 0x0fff;
- if (opcode & (1 << 23))
+ if ((opcode & (1 << 23)) == 0)
immed = -immed;
sprintf(cp, "LDR\tr%d, %#8.8" PRIx32,
(int) (opcode >> 12) & 0xf,
if (((opcode >> 8) & 0xf) == 0xc || (opcode & 0x0900) == 0x0900) {
char *p1 = "]", *p2 = "";
- if (!(opcode & 0x0600))
+ if (!(opcode & 0x0500))
return ERROR_INVALID_ARGUMENTS;
immed = opcode & 0x00ff;