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More instruction decoding fixes:
[openocd.git] / src / target / arm_disassembler.c
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index 149d1976678c2de093e89df232816087663c1afa..0478ee9c6797ce35a1f347f8720ce61749c574e5 100644 (file)
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -1644,7 +1644,7 @@ int evaluate_data_proc_thumb(uint16_t opcode, uint32_t address, arm_instruction_
                                break;
                        case 0x9:
                                instruction->type = ARM_RSB;
-                               mnemonic = "NEGS";
+                               mnemonic = "RSBS";
                                instruction->info.data_proc.variant = 0 /*immediate*/;
                                instruction->info.data_proc.shifter_operand.immediate.immediate = 0;
                                instruction->info.data_proc.Rn = Rm;
@@ -1944,17 +1944,21 @@ int evaluate_load_store_multiple_thumb(uint16_t opcode, uint32_t address, arm_in
 
        if ((opcode & 0xf000) == 0xc000)
        { /* generic load/store multiple */
+               char *wback = "!";
+
                if (L)
                {
                        instruction->type = ARM_LDM;
                        mnemonic = "LDM";
+                       if (opcode & (1 << Rn))
+                               wback = "";
                }
                else
                {
                        instruction->type = ARM_STM;
                        mnemonic = "STM";
                }
-               snprintf(ptr_name,7,"r%i!, ",Rn);
+               snprintf(ptr_name, sizeof ptr_name, "r%i%s, ", Rn, wback);
        }
        else
        { /* push/pop */
@@ -2600,7 +2604,6 @@ static int t2ev_data_mod_immed(uint32_t opcode, uint32_t address,
                        mnemonic = "TST";
                        one = true;
                        suffix = "";
-                       suffix2 = ".W";
                        rd = rn;
                } else {
                        instruction->type = ARM_AND;
@@ -2660,6 +2663,7 @@ static int t2ev_data_mod_immed(uint32_t opcode, uint32_t address,
        case 10:
                instruction->type = ARM_ADC;
                mnemonic = "ADC";
+               suffix2 = ".W";
                break;
        case 11:
                instruction->type = ARM_SBC;
@@ -2708,8 +2712,8 @@ static int t2ev_data_immed(uint32_t opcode, uint32_t address,
        bool add = false;
        bool is_signed = false;
 
-       immed = (opcode & 0x0ff) | ((opcode & 0x7000) >> 12);
-       if (opcode & (1 << 27))
+       immed = (opcode & 0x0ff) | ((opcode & 0x7000) >> 4);
+       if (opcode & (1 << 26))
                immed |= (1 << 11);
 
        switch ((opcode >> 20) & 0x1f) {
@@ -2718,15 +2722,16 @@ static int t2ev_data_immed(uint32_t opcode, uint32_t address,
                        add = true;
                        goto do_adr;
                }
-               mnemonic = "ADD.W";
+               mnemonic = "ADDW";
                break;
        case 4:
-               mnemonic = "MOV.W";
-               break;
+               immed |= (opcode >> 4) & 0xf000;
+               sprintf(cp, "MOVW\tr%d, #%d\t; %#3.3x", rd, immed, immed);
+               return ERROR_OK;
        case 0x0a:
                if (rn == 0xf)
                        goto do_adr;
-               mnemonic = "SUB.W";
+               mnemonic = "SUBW";
                break;
        case 0x0c:
                /* move constant to top 16 bits of register */
@@ -2743,7 +2748,7 @@ static int t2ev_data_immed(uint32_t opcode, uint32_t address,
                immed |= (opcode >> 10) & 0x1c;
                sprintf(cp, "%sSAT\tr%d, #%d, r%d, %s #%d\t",
                                is_signed ? "S" : "U",
-                               rd, (int) (opcode & 0x1f) + 1, rn,
+                               rd, (int) (opcode & 0x1f) + is_signed, rn,
                                (opcode & (1 << 21)) ? "ASR" : "LSL",
                                immed ? immed : 32);
                return ERROR_OK;
@@ -2848,6 +2853,7 @@ static int t2ev_store_single(uint32_t opcode, uint32_t address,
        sprintf(cp, "STR%s.W\tr%d, [r%d, r%d, LSL #%d]",
                        size, rt, rn, (int) opcode & 0x0f,
                        (int) (opcode >> 4) & 0x03);
+       return ERROR_OK;
 
 imm12:
        immed = opcode & 0x0fff;
@@ -2964,22 +2970,22 @@ static int t2ev_ldm_stm(uint32_t opcode, uint32_t address,
 
        switch (op) {
        case 2:
-               sprintf(cp, "STMB\tr%d%s, ", rn, t ? "!" : "");
+               sprintf(cp, "STM.W\tr%d%s, ", rn, t ? "!" : "");
                break;
        case 3:
                if (rn == 13 && t)
-                       sprintf(cp, "POP\t");
+                       sprintf(cp, "POP.W\t");
                else
                        sprintf(cp, "LDM.W\tr%d%s, ", rn, t ? "!" : "");
                break;
        case 4:
                if (rn == 13 && t)
-                       sprintf(cp, "PUSH\t");
+                       sprintf(cp, "PUSH.W\t");
                else
-                       sprintf(cp, "STM.W\tr%d%s, ", rn, t ? "!" : "");
+                       sprintf(cp, "STMDB\tr%d%s, ", rn, t ? "!" : "");
                break;
        case 5:
-               sprintf(cp, "LDMB\tr%d%s, ", rn, t ? "!" : "");
+               sprintf(cp, "LDMDB.W\tr%d%s, ", rn, t ? "!" : "");
                break;
        default:
                return ERROR_INVALID_ARGUMENTS;
@@ -3278,7 +3284,7 @@ static int t2ev_load_word(uint32_t opcode, uint32_t address,
 
        if (rn == 0xf) {
                immed = opcode & 0x0fff;
-               if (opcode & (1 << 23))
+               if ((opcode & (1 << 23)) == 0)
                        immed = -immed;
                sprintf(cp, "LDR\tr%d, %#8.8" PRIx32,
                                (int) (opcode >> 12) & 0xf,
@@ -3316,7 +3322,7 @@ static int t2ev_load_word(uint32_t opcode, uint32_t address,
        if (((opcode >> 8) & 0xf) == 0xc || (opcode & 0x0900) == 0x0900) {
                char *p1 = "]", *p2 = "";
 
-               if (!(opcode & 0x0600))
+               if (!(opcode & 0x0500))
                        return ERROR_INVALID_ARGUMENTS;
 
                immed = opcode & 0x00ff;
@@ -3349,18 +3355,21 @@ static int t2ev_load_byte_hints(uint32_t opcode, uint32_t address,
        int rt = (opcode >> 12) & 0xf;
        int op2 = (opcode >> 6) & 0x3f;
        unsigned immed;
-       char *p1 = "]", *p2 = "";
+       char *p1 = "", *p2 = "]";
        char *mnemonic;
 
        switch ((opcode >> 23) & 0x3) {
        case 0:
                if ((rn & rt) == 0xf) {
-preload_immediate_t2:
+pld_literal:
                        immed = opcode & 0xfff;
-preload_immediate_t1:
-                       p1 = (opcode & (1 << 21)) ? "W" : "";
-                       sprintf(cp, "PLD%s\t[r%d, #%d]\t; %#6.6x",
-                                       p1, rn, immed, immed);
+                       address = thumb_alignpc4(address);
+                       if (opcode & (1 << 23))
+                               address += immed;
+                       else
+                               address -= immed;
+                       sprintf(cp, "PLD\tr%d, %#8.8" PRIx32,
+                                       rt, address);
                        return ERROR_OK;
                }
                if (rn == 0x0f && rt != 0x0f) {
@@ -3386,12 +3395,17 @@ ldrb_literal:
                if ((op2 & 0x3c) == 0x30) {
                        if (rt == 0x0f) {
                                immed = opcode & 0xff;
-                               goto preload_immediate_t1;
+                               immed = -immed;
+preload_immediate:
+                               p1 = (opcode & (1 << 21)) ? "W" : "";
+                               sprintf(cp, "PLD%s\t[r%d, #%d]\t; %#6.6x",
+                                               p1, rn, immed, immed);
+                               return ERROR_OK;
                        }
                        mnemonic = "LDRB";
 ldrxb_immediate_t3:
                        immed = opcode & 0xff;
-                       if (opcode & 0x200)
+                       if (!(opcode & 0x200))
                                immed = -immed;
 
                        /* two indexed modes will write back rn */
@@ -3427,8 +3441,12 @@ ldrxb_immediate_t2:
                }
                break;
        case 1:
-               if (rt == 0xf)
-                       goto preload_immediate_t2;
+               if ((rn & rt) == 0xf)
+                       goto pld_literal;
+               if (rt == 0xf) {
+                       immed = opcode & 0xfff;
+                       goto preload_immediate;
+               }
                if (rn == 0x0f)
                        goto ldrb_literal;
                mnemonic = "LDRB.W";
@@ -3436,7 +3454,6 @@ ldrxb_immediate_t2:
                goto ldrxb_immediate_t2;
        case 2:
                if ((rn & rt) == 0xf) {
-pli_immediate:
                        immed = opcode & 0xfff;
                        address = thumb_alignpc4(address);
                        if (opcode & (1 << 23))
@@ -3461,7 +3478,7 @@ ldrsb_literal:
                        break;
                if ((op2 & 0x3c) == 0x38) {
                        immed = opcode & 0xff;
-                       sprintf(cp, "LDRSBT\tr%d, [r%d, #%d]\t; %2.2x",
+                       sprintf(cp, "LDRSBT\tr%d, [r%d, #%d]\t; %#2.2x",
                                        rt, rn, immed, immed);
                        return ERROR_OK;
                }
@@ -3469,8 +3486,8 @@ ldrsb_literal:
                        if (rt == 0xf) {
                                immed = opcode & 0xff;
                                immed = -immed; // pli
-                               sprintf(cp, "PLI\t[r%d, #-%d]\t; %2.2x",
-                                               rn, immed, immed);
+                               sprintf(cp, "PLI\t[r%d, #%d]\t; -%#2.2x",
+                                               rn, immed, -immed);
                                return ERROR_OK;
                        }
                        mnemonic = "LDRSB";
@@ -3494,8 +3511,12 @@ ldrsb_literal:
                }
                break;
        case 3:
-               if (rt == 0xf)
-                       goto pli_immediate;
+               if (rt == 0xf) {
+                       immed = opcode & 0xfff;
+                       sprintf(cp, "PLI\t[r%d, #%d]\t; %#3.3" PRIx32,
+                                       rn, immed, immed);
+                       return ERROR_OK;
+               }
                if (rn == 0xf)
                        goto ldrsb_literal;
                immed = opcode & 0xfff;
@@ -3512,7 +3533,7 @@ static int t2ev_load_halfword(uint32_t opcode, uint32_t address,
        int rn = (opcode >> 16) & 0xf;
        int rt = (opcode >> 12) & 0xf;
        int op2 = (opcode >> 6) & 0x3f;
-       char *sign = (opcode & (1 < 24)) ? "S" : "";
+       char *sign = "";
        unsigned immed;
 
        if (rt == 0xf) {
@@ -3520,6 +3541,9 @@ static int t2ev_load_halfword(uint32_t opcode, uint32_t address,
                return ERROR_OK;
        }
 
+       if (opcode & (1 << 24))
+               sign = "S";
+
        if ((opcode & (1 << 23)) == 0) {
                if (rn == 0xf) {
 ldrh_literal:
@@ -3542,16 +3566,16 @@ ldrh_literal:
                        return ERROR_OK;
                }
                if ((op2 & 0x3c) == 0x38) {
-                       immed = (opcode >> 4) & 0x3;
+                       immed = opcode & 0xff;
                        sprintf(cp, "LDR%sHT\tr%d, [r%d, #%d]\t; %#2.2x",
                                        sign, rt, rn, immed, immed);
                        return ERROR_OK;
                }
                if ((op2 & 0x3c) == 0x30 || (op2 & 0x24) == 0x24) {
-                       char *p1 = "]", *p2 = "";
+                       char *p1 = "", *p2 = "]";
 
                        immed = opcode & 0xff;
-                       if (opcode & 0x200)
+                       if (!(opcode & 0x200))
                                immed = -immed;
 
                        /* two indexed modes will write back rn */
@@ -3572,8 +3596,9 @@ ldrh_literal:
                        goto ldrh_literal;
 
                immed = opcode & 0xfff;
-               sprintf(cp, "LDR%sH.W\tr%d, [r%d, #%d]\t; %#6.6x",
-                               sign, rt, rn, immed, immed);
+               sprintf(cp, "LDR%sH%s\tr%d, [r%d, #%d]\t; %#6.6x",
+                               sign, *sign ? "" : ".W",
+                               rt, rn, immed, immed);
                return ERROR_OK;
        }
 
@@ -3648,7 +3673,7 @@ int thumb2_opcode(target_t *target, uint32_t address, arm_instruction_t *instruc
                retval = t2ev_load_word(opcode, address, instruction, cp);
 
        /* ARMv7-M: A5.3.8 Load halfword, unallocated memory hints */
-       else if ((opcode & 0x1e700000) == 0x18e00000)
+       else if ((opcode & 0x1e700000) == 0x18300000)
                retval = t2ev_load_halfword(opcode, address, instruction, cp);
 
        /* ARMv7-M: A5.3.9 Load byte, memory hints */
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