* *
***************************************************************************/
-/* Scan out and in from target ordered uint8_t buffers */
+/**
+ * Scan DPACC or APACC using target ordered uint8_t buffers. No endianness
+ * conversions are performed. See section 4.4.3 of the ADIv5 spec, which
+ * discusses operations which access these registers.
+ *
+ * Note that only one scan is performed. If RnW is set, a separate scan
+ * will be needed to collect the data which was read; the "invalue" collects
+ * the posted result of a preceding operation, not the current one.
+ *
+ * @param swjdp the DAP
+ * @param instr JTAG_DP_APACC (AP access) or JTAG_DP_DPACC (DP access)
+ * @param reg_addr two significant bits; A[3:2]; for APACC access, the
+ * SELECT register has more addressing bits.
+ * @param RnW false iff outvalue will be written to the DP or AP
+ * @param outvalue points to a 32-bit (little-endian) integer
+ * @param invalue NULL, or points to a 32-bit (little-endian) integer
+ * @param ack points to where the three bit JTAG_ACK_* code will be stored
+ */
static int adi_jtag_dp_scan(struct swjdp_common *swjdp,
uint8_t instr, uint8_t reg_addr, uint8_t RnW,
uint8_t *outvalue, uint8_t *invalue, uint8_t *ack)
arm_jtag_set_instr(jtag_info, instr, NULL);
/* Add specified number of tck clocks before accessing memory bus */
- if ((instr == DAP_IR_APACC) && ((reg_addr == AP_REG_DRW)||((reg_addr&0xF0) == AP_REG_BD0))&& (swjdp->memaccess_tck != 0))
+
+ /* REVISIT these TCK cycles should be *AFTER* updating APACC, since
+ * they provide more time for the (MEM) AP to complete the read ...
+ * See "Minimum Response Time" for JTAG-DP, in the ADIv5 spec.
+ */
+ if ((instr == JTAG_DP_APACC)
+ && ((reg_addr == AP_REG_DRW)
+ || ((reg_addr & 0xF0) == AP_REG_BD0))
+ && (swjdp->memaccess_tck != 0))
jtag_add_runtest(swjdp->memaccess_tck, jtag_set_end_state(TAP_IDLE));
+ /* Scan out a read or write operation using some DP or AP register.
+ * For APACC access with any sticky error flag set, this is discarded.
+ */
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 3;
buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1));
fields[0].out_value = &out_addr_buf;
fields[0].in_value = ack;
+ /* NOTE: if we receive JTAG_ACK_WAIT, the previous operation did not
+ * complete; data we write is discarded, data we read is unpredictable.
+ * When overrun detect is active, STICKYORUN is set.
+ */
+
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = outvalue;
arm_jtag_set_instr(jtag_info, instr, NULL);
/* Add specified number of tck clocks before accessing memory bus */
- if ((instr == DAP_IR_APACC) && ((reg_addr == AP_REG_DRW)||((reg_addr&0xF0) == AP_REG_BD0))&& (swjdp->memaccess_tck != 0))
+
+ /* REVISIT these TCK cycles should be *AFTER* updating APACC, since
+ * they provide more time for the (MEM) AP to complete the read ...
+ */
+ if ((instr == JTAG_DP_APACC)
+ && ((reg_addr == AP_REG_DRW)
+ || ((reg_addr & 0xF0) == AP_REG_BD0))
+ && (swjdp->memaccess_tck != 0))
jtag_add_runtest(swjdp->memaccess_tck, jtag_set_end_state(TAP_IDLE));
fields[0].tap = jtag_info->tap;
adi_jtag_dp_scan(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL);
if ((RnW == DPAP_READ) && (invalue != NULL))
- {
- adi_jtag_dp_scan(swjdp, DAP_IR_DPACC, DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
- }
+ adi_jtag_dp_scan(swjdp, JTAG_DP_DPACC,
+ DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
- /* In TRANS_MODE_ATOMIC all DAP_IR_APACC transactions wait for ack = OK/FAULT and the check CTRL_STAT */
- if ((instr == DAP_IR_APACC) && (swjdp->trans_mode == TRANS_MODE_ATOMIC))
- {
+ /* In TRANS_MODE_ATOMIC all JTAG_DP_APACC transactions wait for
+ * ack = OK/FAULT and the check CTRL_STAT
+ */
+ if ((instr == JTAG_DP_APACC)
+ && (swjdp->trans_mode == TRANS_MODE_ATOMIC))
return swjdp_transaction_endcheck(swjdp);
- }
return ERROR_OK;
}
uint8_t instr, uint8_t reg_addr, uint8_t RnW,
uint32_t outvalue, uint32_t *invalue)
{
+ /* Issue the read or write */
adi_jtag_dp_scan_u32(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL);
+ /* For reads, collect posted value; RDBUFF has no other effect.
+ * Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK".
+ */
if ((RnW == DPAP_READ) && (invalue != NULL))
- {
- adi_jtag_dp_scan_u32(swjdp, DAP_IR_DPACC, DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
- }
+ adi_jtag_dp_scan_u32(swjdp, JTAG_DP_DPACC,
+ DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
- /* In TRANS_MODE_ATOMIC all DAP_IR_APACC transactions wait for ack = OK/FAULT and then check CTRL_STAT */
- if ((instr == DAP_IR_APACC) && (swjdp->trans_mode == TRANS_MODE_ATOMIC))
- {
+ /* In TRANS_MODE_ATOMIC all JTAG_DP_APACC transactions wait for
+ * ack = OK/FAULT and then check CTRL_STAT
+ */
+ if ((instr == JTAG_DP_APACC)
+ && (swjdp->trans_mode == TRANS_MODE_ATOMIC))
return swjdp_transaction_endcheck(swjdp);
- }
return ERROR_OK;
}
#if 0
/* Danger!!!! BROKEN!!!! */
- scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
/* Danger!!!! BROKEN!!!! Why will jtag_execute_queue() fail here????
R956 introduced the check on return value here and now Michael Schwingen reports
that this code no longer works....
/* Why??? second time it works??? */
#endif
- scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ /* Post CTRL/STAT read; discard any previous posted read value
+ * but collect its ACK status.
+ */
+ scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
if ((retval = jtag_execute_queue()) != ERROR_OK)
return retval;
swjdp->ack = swjdp->ack & 0x7;
- if (swjdp->ack != 2)
+ /* common code path avoids calling timeval_ms() */
+ if (swjdp->ack != JTAG_ACK_OK_FAULT)
{
long long then = timeval_ms();
- while (swjdp->ack != 2)
+
+ while (swjdp->ack != JTAG_ACK_OK_FAULT)
{
- if (swjdp->ack == 1)
+ if (swjdp->ack == JTAG_ACK_WAIT)
{
if ((timeval_ms()-then) > 1000)
{
- LOG_WARNING("Timeout (1000ms) waiting for ACK = OK/FAULT in SWJDP transaction");
+ /* NOTE: this would be a good spot
+ * to use JTAG_DP_ABORT.
+ */
+ LOG_WARNING("Timeout (1000ms) waiting "
+ "for ACK=OK/FAULT "
+ "in JTAG-DP transaction");
return ERROR_JTAG_DEVICE_ERROR;
}
}
else
{
- LOG_WARNING("Invalid ACK in SWJDP transaction");
+ LOG_WARNING("Invalid ACK %#x"
+ "in JTAG-DP transaction",
+ swjdp->ack);
return ERROR_JTAG_DEVICE_ERROR;
}
- scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
if ((retval = jtag_execute_queue()) != ERROR_OK)
return retval;
swjdp->ack = swjdp->ack & 0x7;
}
- } else
- {
- /* common code path avoids fn to timeval_ms() */
}
/* Check for STICKYERR and STICKYORUN */
/* Print information about last AHBAP access */
LOG_ERROR("AHBAP Cached values: dp_select 0x%" PRIx32 ", ap_csw 0x%" PRIx32 ", ap_tar 0x%" PRIx32 "", swjdp->dp_select_value, swjdp->ap_csw_value, swjdp->ap_tar_value);
if (ctrlstat & SSTICKYORUN)
- LOG_ERROR("SWJ-DP OVERRUN - check clock or reduce jtag speed");
+ LOG_ERROR("JTAG-DP OVERRUN - "
+ "check clock or reduce jtag speed");
if (ctrlstat & SSTICKYERR)
- LOG_ERROR("SWJ-DP STICKY ERROR");
+ LOG_ERROR("JTAG-DP STICKY ERROR");
/* Clear Sticky Error Bits */
- scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_WRITE, swjdp->dp_ctrl_stat | SSTICKYORUN | SSTICKYERR, NULL);
- scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ DP_CTRL_STAT, DPAP_WRITE,
+ swjdp->dp_ctrl_stat | SSTICKYORUN
+ | SSTICKYERR, NULL);
+ scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
if ((retval = jtag_execute_queue()) != ERROR_OK)
return retval;
static int dap_dp_write_reg(struct swjdp_common *swjdp,
uint32_t value, uint8_t reg_addr)
{
- return scan_inout_check_u32(swjdp, DAP_IR_DPACC, reg_addr, DPAP_WRITE, value, NULL);
+ return scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ reg_addr, DPAP_WRITE, value, NULL);
}
static int dap_dp_read_reg(struct swjdp_common *swjdp,
uint32_t *value, uint8_t reg_addr)
{
- return scan_inout_check_u32(swjdp, DAP_IR_DPACC, reg_addr, DPAP_READ, 0, value);
+ return scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ reg_addr, DPAP_READ, 0, value);
}
int dap_ap_select(struct swjdp_common *swjdp,uint8_t apsel)
uint32_t reg_addr, uint8_t *out_value_buf)
{
dap_dp_bankselect(swjdp, reg_addr);
- scan_inout_check(swjdp, DAP_IR_APACC, reg_addr, DPAP_WRITE, out_value_buf, NULL);
+ scan_inout_check(swjdp, JTAG_DP_APACC, reg_addr,
+ DPAP_WRITE, out_value_buf, NULL);
return ERROR_OK;
}
buf_set_u32(out_value_buf, 0, 32, value);
dap_dp_bankselect(swjdp, reg_addr);
- scan_inout_check(swjdp, DAP_IR_APACC, reg_addr, DPAP_WRITE, out_value_buf, NULL);
+ scan_inout_check(swjdp, JTAG_DP_APACC, reg_addr,
+ DPAP_WRITE, out_value_buf, NULL);
return ERROR_OK;
}
int dap_ap_read_reg_u32(struct swjdp_common *swjdp, uint32_t reg_addr, uint32_t *value)
{
dap_dp_bankselect(swjdp, reg_addr);
- scan_inout_check_u32(swjdp, DAP_IR_APACC, reg_addr, DPAP_READ, 0, value);
+ scan_inout_check_u32(swjdp, JTAG_DP_APACC, reg_addr,
+ DPAP_READ, 0, value);
return ERROR_OK;
}
dap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_SINGLE, address);
/* Scan out first read */
- adi_jtag_dp_scan(swjdp, DAP_IR_APACC, AP_REG_DRW, DPAP_READ, 0, NULL, NULL);
+ adi_jtag_dp_scan(swjdp, JTAG_DP_APACC, AP_REG_DRW,
+ DPAP_READ, 0, NULL, NULL);
for (readcount = 0; readcount < blocksize - 1; readcount++)
{
- /* Scan out read instruction and scan in previous value */
- adi_jtag_dp_scan(swjdp, DAP_IR_APACC, AP_REG_DRW, DPAP_READ, 0, buffer + 4 * readcount, &swjdp->ack);
+ /* Scan out next read; scan in posted value for the
+ * previous one. Assumes read is acked "OK/FAULT",
+ * and CTRL_STAT says that meant "OK".
+ */
+ adi_jtag_dp_scan(swjdp, JTAG_DP_APACC, AP_REG_DRW,
+ DPAP_READ, 0, buffer + 4 * readcount,
+ &swjdp->ack);
}
- /* Scan in last value */
- adi_jtag_dp_scan(swjdp, DAP_IR_DPACC, DP_RDBUFF, DPAP_READ, 0, buffer + 4 * readcount, &swjdp->ack);
+ /* Scan in last posted value; RDBUFF has no other effect,
+ * assuming ack is OK/FAULT and CTRL_STAT says "OK".
+ */
+ adi_jtag_dp_scan(swjdp, JTAG_DP_DPACC, DP_RDBUFF,
+ DPAP_READ, 0, buffer + 4 * readcount,
+ &swjdp->ack);
if (swjdp_transaction_endcheck(swjdp) == ERROR_OK)
{
wcount = wcount - blocksize;
Code Review / openocd.git / blobdiff