+typedef struct arm9tdmi_vector_s
+{
+ char *name;
+ uint32_t value;
+} arm9tdmi_vector_t;
+
+enum arm9tdmi_vector
+{
+ ARM9TDMI_RESET_VECTOR = 0x01,
+ ARM9TDMI_UNDEF_VECTOR = 0x02,
+ ARM9TDMI_SWI_VECTOR = 0x04,
+ ARM9TDMI_PABT_VECTOR = 0x08,
+ ARM9TDMI_DABT_VECTOR = 0x10,
+ /* BIT(5) reserved -- must be zero */
+ ARM9TDMI_IRQ_VECTOR = 0x40,
+ ARM9TDMI_FIQ_VECTOR = 0x80,
+};
+
+int arm9tdmi_init_target(struct command_context_s *cmd_ctx,
+ struct target_s *target);
+int arm9tdmi_examine(struct target_s *target);
+int arm9tdmi_init_arch_info(target_t *target,
+ arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap);
+int arm9tdmi_register_commands(struct command_context_s *cmd_ctx);
+
+int arm9tdmi_clock_out(arm_jtag_t *jtag_info,
+ uint32_t instr, uint32_t out, uint32_t *in, int sysspeed);
+int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in);
+int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
+ void *in, int size, int be);
+void arm9tdmi_read_core_regs(target_t *target,
+ uint32_t mask, uint32_t* core_regs[16]);
+void arm9tdmi_write_core_regs(target_t *target,
+ uint32_t mask, uint32_t core_regs[16]);
+
+int arm9tdmi_examine_debug_reason(target_t *target);
+
+void arm9tdmi_load_word_regs(target_t *target, uint32_t mask);
+void arm9tdmi_load_hword_reg(target_t *target, int num);
+void arm9tdmi_load_byte_reg(target_t *target, int num);
+void arm9tdmi_store_word_regs(target_t *target, uint32_t mask);
+void arm9tdmi_store_hword_reg(target_t *target, int num);
+void arm9tdmi_store_byte_reg(target_t *target, int num);