- Fixes '=' whitespace
[openocd.git] / src / target / arm9tdmi.c
index 8edcdcb2866a8bc095dcbcf5320b3b6b83e4e4dd..fac0c8db7254f210f404f35e0efd86fe647a561d 100644 (file)
@@ -203,10 +203,10 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, uint32_t out, uint
 
        if (in)
        {
-               fields[0].in_value=(uint8_t *)in;
+               fields[0].in_value = (uint8_t *)in;
                jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
-               jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
+               jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
        }
        else
        {
@@ -265,7 +265,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
 
        jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
-       jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
+       jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
 
        jtag_add_runtest(0, jtag_get_end_state());
 
@@ -292,15 +292,16 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
 
 extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
 
-static int arm9endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
 {
+  uint8_t *in = (uint8_t *)arg;
        arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0);
        return ERROR_OK;
 }
 
 /* clock the target, and read the databus
  * the *in pointer points to a buffer where elements of 'size' bytes
- * are stored in big (be==1) or little (be==0) endianness
+ * are stored in big (be == 1) or little (be == 0) endianness
  */
 int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
 {
@@ -332,7 +333,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
 
        jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
-       jtag_add_callback4(arm9endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
+       jtag_add_callback4(arm9endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
 
        jtag_add_runtest(0, jtag_get_end_state());
 
@@ -510,7 +511,7 @@ void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        arm_jtag_t *jtag_info = &arm7_9->jtag_info;
 
-       LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
+       LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr);
 
        /* MSR1 fetched */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), 0, NULL, 0);
@@ -816,8 +817,8 @@ int arm9tdmi_examine(struct target_s *target)
                reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
                reg_cache_t *t;
                /* one extra register (vector catch) */
-               t=embeddedice_build_reg_cache(target, arm7_9);
-               if (t==NULL)
+               t = embeddedice_build_reg_cache(target, arm7_9);
+               if (t == NULL)
                        return ERROR_FAIL;
                (*cache_p) = t;
                arm7_9->eice_cache = (*cache_p);
@@ -830,13 +831,13 @@ int arm9tdmi_examine(struct target_s *target)
                }
                target_set_examined(target);
        }
-       if ((retval=embeddedice_setup(target))!=ERROR_OK)
+       if ((retval = embeddedice_setup(target)) != ERROR_OK)
                return retval;
-       if ((retval=arm7_9_setup(target))!=ERROR_OK)
+       if ((retval = arm7_9_setup(target)) != ERROR_OK)
                return retval;
        if (arm7_9->etm_ctx)
        {
-               if ((retval=etm_setup(target))!=ERROR_OK)
+               if ((retval = etm_setup(target)) != ERROR_OK)
                        return retval;
        }
        return ERROR_OK;

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)