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Matt Hsu <matt@0xlab.org> cortex_a8_exec_opcode is writing the ARM instruction into
[openocd.git] / src / target / arm9tdmi.c
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index dc11d7c07a25b1343e7b8ab506e0bde1b65244de..8cbc3423674f4350aaab55bf08d112328806e630 100644 (file)
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -39,7 +39,7 @@
 int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 
 /* forward declarations */
-int arm9tdmi_target_create( struct target_s *target, Jim_Interp *interp );
+int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp);
 
 int arm9tdmi_quit(void);
 
@@ -162,7 +162,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)
 }
 
 /* put an instruction in the ARM9TDMI pipeline or write the data bus, and optionally read data */
-int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int sysspeed)
+int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, uint32_t out, uint32_t *in, int sysspeed)
 {
        int retval = ERROR_OK;
        scan_field_t fields[3];
@@ -203,10 +203,10 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
 
        if (in)
        {
-               fields[0].in_value=(uint8_t *)in;
+               fields[0].in_value = (uint8_t *)in;
                jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
-               jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
+               jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
        }
        else
        {
@@ -235,7 +235,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
 }
 
 /* just read data (instruction and data-out = don't care) */
-int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
+int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
 {
        int retval = ERROR_OK;;
        scan_field_t fields[3];
@@ -265,7 +265,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 
        jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
-       jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
+       jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
 
        jtag_add_runtest(0, jtag_get_end_state());
 
@@ -292,15 +292,16 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 
 extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
 
-static int arm9endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
 {
+  uint8_t *in = (uint8_t *)arg;
        arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0);
        return ERROR_OK;
 }
 
 /* clock the target, and read the databus
  * the *in pointer points to a buffer where elements of 'size' bytes
- * are stored in big (be==1) or little (be==0) endianness
+ * are stored in big (be == 1) or little (be == 0) endianness
  */
 int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
 {
@@ -332,7 +333,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
 
        jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
-       jtag_add_callback4(arm9endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
+       jtag_add_callback4(arm9endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
 
        jtag_add_runtest(0, jtag_get_end_state());
 
@@ -345,7 +346,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
 
                if (in)
                {
-                       LOG_DEBUG("in: 0x%8.8x", *(u32*)in);
+                       LOG_DEBUG("in: 0x%8.8x", *(uint32_t*)in);
                }
                else
                {
@@ -357,7 +358,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
        return ERROR_OK;
 }
 
-void arm9tdmi_change_to_arm(target_t *target, u32 *r0, u32 *pc)
+void arm9tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
 {
        int retval = ERROR_OK;
        /* get pointers to arch-specific information */
@@ -412,7 +413,7 @@ void arm9tdmi_change_to_arm(target_t *target, u32 *r0, u32 *pc)
        *pc -= 0xc;
 }
 
-void arm9tdmi_read_core_regs(target_t *target, u32 mask, u32* core_regs[16])
+void arm9tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16])
 {
        int i;
        /* get pointers to arch-specific information */
@@ -438,7 +439,7 @@ void arm9tdmi_read_core_regs(target_t *target, u32 mask, u32* core_regs[16])
        }
 }
 
-void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buffer, int size)
+void arm9tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size)
 {
        int i;
        /* get pointers to arch-specific information */
@@ -446,7 +447,7 @@ void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        arm_jtag_t *jtag_info = &arm7_9->jtag_info;
        int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
-       u32 *buf_u32 = buffer;
+       uint32_t *buf_u32 = buffer;
        uint16_t *buf_u16 = buffer;
        uint8_t *buf_u8 = buffer;
 
@@ -479,7 +480,7 @@ void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf
        }
 }
 
-void arm9tdmi_read_xpsr(target_t *target, u32 *xpsr, int spsr)
+void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
 {
        /* get pointers to arch-specific information */
        armv4_5_common_t *armv4_5 = target->arch_info;
@@ -503,14 +504,14 @@ void arm9tdmi_read_xpsr(target_t *target, u32 *xpsr, int spsr)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0);
 }
 
-void arm9tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr)
+void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
 {
        /* get pointers to arch-specific information */
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        arm_jtag_t *jtag_info = &arm7_9->jtag_info;
 
-       LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
+       LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr);
 
        /* MSR1 fetched */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), 0, NULL, 0);
@@ -565,7 +566,7 @@ void arm9tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int sps
        }
 }
 
-void arm9tdmi_write_core_regs(target_t *target, u32 mask, u32 core_regs[16])
+void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16])
 {
        int i;
        /* get pointers to arch-specific information */
@@ -586,13 +587,13 @@ void arm9tdmi_write_core_regs(target_t *target, u32 mask, u32 core_regs[16])
        for (i = 0; i <= 15; i++)
        {
                if (mask & (1 << i))
-                       /* nothing fetched, LDM still in EXECUTE (1+i cycle) */
+                       /* nothing fetched, LDM still in EXECUTE (1 + i cycle) */
                        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, core_regs[i], NULL, 0);
        }
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void arm9tdmi_load_word_regs(target_t *target, u32 mask)
+void arm9tdmi_load_word_regs(target_t *target, uint32_t mask)
 {
        /* get pointers to arch-specific information */
        armv4_5_common_t *armv4_5 = target->arch_info;
@@ -628,7 +629,7 @@ void arm9tdmi_load_byte_reg(target_t *target, int num)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_store_word_regs(target_t *target, u32 mask)
+void arm9tdmi_store_word_regs(target_t *target, uint32_t mask)
 {
        /* get pointers to arch-specific information */
        armv4_5_common_t *armv4_5 = target->arch_info;
@@ -664,7 +665,7 @@ void arm9tdmi_store_byte_reg(target_t *target, int num)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_write_pc(target_t *target, u32 pc)
+void arm9tdmi_write_pc(target_t *target, uint32_t pc)
 {
        /* get pointers to arch-specific information */
        armv4_5_common_t *armv4_5 = target->arch_info;
@@ -761,7 +762,7 @@ void arm9tdmi_branch_resume_thumb(target_t *target)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
 }
 
-void arm9tdmi_enable_single_step(target_t *target, u32 next_pc)
+void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc)
 {
        /* get pointers to arch-specific information */
        armv4_5_common_t *armv4_5 = target->arch_info;
@@ -816,8 +817,8 @@ int arm9tdmi_examine(struct target_s *target)
                reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
                reg_cache_t *t;
                /* one extra register (vector catch) */
-               t=embeddedice_build_reg_cache(target, arm7_9);
-               if (t==NULL)
+               t = embeddedice_build_reg_cache(target, arm7_9);
+               if (t == NULL)
                        return ERROR_FAIL;
                (*cache_p) = t;
                arm7_9->eice_cache = (*cache_p);
@@ -830,13 +831,13 @@ int arm9tdmi_examine(struct target_s *target)
                }
                target_set_examined(target);
        }
-       if ((retval=embeddedice_setup(target))!=ERROR_OK)
+       if ((retval = embeddedice_setup(target)) != ERROR_OK)
                return retval;
-       if ((retval=arm7_9_setup(target))!=ERROR_OK)
+       if ((retval = arm7_9_setup(target)) != ERROR_OK)
                return retval;
        if (arm7_9->etm_ctx)
        {
-               if ((retval=etm_setup(target))!=ERROR_OK)
+               if ((retval = etm_setup(target)) != ERROR_OK)
                        return retval;
        }
        return ERROR_OK;
@@ -978,7 +979,7 @@ int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, cha
        arm7_9_common_t *arm7_9;
        arm9tdmi_common_t *arm9tdmi;
        reg_t *vector_catch;
-       u32 vector_catch_value;
+       uint32_t vector_catch_value;
        int i, j;
 
        if (arm9tdmi_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi) != ERROR_OK)
@@ -994,7 +995,7 @@ int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, cha
                embeddedice_read_reg(vector_catch);
 
        /* get the current setting */
-       vector_catch_value = buf_get_u32(vector_catch->value, 0, 32);
+       vector_catch_value = buf_get_u32(vector_catch->value, 0, 8);
 
        if (argc > 0)
        {
@@ -1027,7 +1028,9 @@ int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, cha
                                        command_print(cmd_ctx, "vector '%s' not found, leaving current setting unchanged", args[i]);
 
                                        /* reread current setting */
-                                       vector_catch_value = buf_get_u32(vector_catch->value, 0, 32);
+                                       vector_catch_value = buf_get_u32(
+                                                       vector_catch->value,
+                                                       0, 8);
 
                                        break;
                                }
@@ -1035,7 +1038,7 @@ int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, cha
                }
 
                /* store new settings */
-               buf_set_u32(vector_catch->value, 0, 32, vector_catch_value);
+               buf_set_u32(vector_catch->value, 0, 8, vector_catch_value);
                embeddedice_store_reg(vector_catch);
        }
 
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