* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
+ * Copyright (C) 2008 by Spencer Oliver *
+ * spen@spen-soft.co.uk *
+ * *
+ * Copyright (C) 2008 by Hongtao Zheng *
+ * hontor@126.com *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
/* forward declarations */
-int arm9tdmi_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
+int arm9tdmi_target_create( struct target_s *target, Jim_Interp *interp );
+
int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int arm9tdmi_quit();
+int arm9tdmi_quit(void);
target_type_t arm9tdmi_target =
{
.assert_reset = arm7_9_assert_reset,
.deassert_reset = arm7_9_deassert_reset,
.soft_reset_halt = arm7_9_soft_reset_halt,
- .prepare_reset_halt = arm7_9_prepare_reset_halt,
.get_gdb_reg_list = armv4_5_get_gdb_reg_list,
.write_memory = arm7_9_write_memory,
.bulk_write_memory = arm7_9_bulk_write_memory,
.checksum_memory = arm7_9_checksum_memory,
+ .blank_check_memory = arm7_9_blank_check_memory,
.run_algorithm = armv4_5_run_algorithm,
.remove_watchpoint = arm7_9_remove_watchpoint,
.register_commands = arm9tdmi_register_commands,
- .target_command = arm9tdmi_target_command,
+ .target_create = arm9tdmi_target_create,
.init_target = arm9tdmi_init_target,
+ .examine = arm9tdmi_examine,
.quit = arm9tdmi_quit
};
int arm9tdmi_examine_debug_reason(target_t *target)
{
+ int retval = ERROR_OK;
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- arm_jtag_scann(&arm7_9->jtag_info, 0x1);
+ if((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1)) != ERROR_OK)
+ {
+ return retval;
+ }
arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
jtag_add_dr_scan(3, fields, TAP_PD);
- jtag_execute_queue();
+ if((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ return retval;
+ }
fields[0].in_value = NULL;
fields[0].out_value = databus;
/* put an instruction in the ARM9TDMI pipeline or write the data bus, and optionally read data */
int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int sysspeed)
{
+ int retval = ERROR_OK;
scan_field_t fields[3];
u8 out_buf[4];
u8 instr_buf[4];
buf_set_u32(&sysspeed_buf, 2, 1, 1);
jtag_add_end_state(TAP_PD);
- arm_jtag_scann(jtag_info, 0x1);
+ if((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+ {
+ return retval;
+ }
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
- jtag_execute_queue();
+ if((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ return retval;
+ }
if (in)
{
/* just read data (instruction and data-out = don't care) */
int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
{
+ int retval = ERROR_OK;;
scan_field_t fields[3];
jtag_add_end_state(TAP_PD);
- arm_jtag_scann(jtag_info, 0x1);
+ if((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+ {
+ return retval;
+ }
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
- jtag_execute_queue();
-
+ if((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ return retval;
+ }
+
if (in)
{
LOG_DEBUG("in: 0x%8.8x", *in);
*/
int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
{
+ int retval = ERROR_OK;
scan_field_t fields[3];
jtag_add_end_state(TAP_PD);
- arm_jtag_scann(jtag_info, 0x1);
+ if((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+ {
+ return retval;
+ }
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
- jtag_execute_queue();
-
+ if((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ return retval;
+ }
+
if (in)
{
- LOG_DEBUG("in: 0x%8.8x", *in);
+ LOG_DEBUG("in: 0x%8.8x", *(u32*)in);
}
else
{
void arm9tdmi_change_to_arm(target_t *target, u32 *r0, u32 *pc)
{
+ int retval = ERROR_OK;
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
/* NOP fetched, BX in Execute (1) */
arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
- jtag_execute_queue();
+ if((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ return;
+ }
/* fix program counter:
* MOV r0, r15 was the 5th instruction (+8)
}
-void arm9tdmi_enable_single_step(target_t *target)
+void arm9tdmi_enable_single_step(target_t *target, u32 next_pc)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
}
else
{
- arm7_9_enable_eice_step(target);
+ arm7_9_enable_eice_step(target, next_pc);
}
}
reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm_jtag_t *jtag_info = &arm7_9->jtag_info;
(*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
armv4_5->core_cache = (*cache_p);
-
- /* one extra register (vector catch) */
- (*cache_p)->next = embeddedice_build_reg_cache(target, arm7_9);
- arm7_9->eice_cache = (*cache_p)->next;
+}
+
+int arm9tdmi_examine(struct target_s *target)
+{
+ /* get pointers to arch-specific information */
+ int retval;
+ armv4_5_common_t *armv4_5 = target->arch_info;
+ arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ if (!target->type->examined)
+ {
+ reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
+ reg_cache_t *t;
+ /* one extra register (vector catch) */
+ t=embeddedice_build_reg_cache(target, arm7_9);
+ if (t==NULL)
+ return ERROR_FAIL;
+ (*cache_p) = t;
+ arm7_9->eice_cache = (*cache_p);
+
+ if (arm7_9->etm_ctx)
+ {
+ arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+ (*cache_p)->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
+ arm7_9->etm_ctx->reg_cache = (*cache_p)->next;
+ }
+ target->type->examined = 1;
+ }
+ if ((retval=embeddedice_setup(target))!=ERROR_OK)
+ return retval;
+ if ((retval=arm7_9_setup(target))!=ERROR_OK)
+ return retval;
if (arm7_9->etm_ctx)
{
- (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
- arm7_9->etm_ctx->reg_cache = (*cache_p)->next->next;
+ if ((retval=etm_setup(target))!=ERROR_OK)
+ return retval;
}
+ return ERROR_OK;
}
int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
}
-int arm9tdmi_quit()
+int arm9tdmi_quit(void)
{
return ERROR_OK;
}
-int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, int chain_pos, char *variant)
+int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, int chain_pos, const char *variant)
{
armv4_5_common_t *armv4_5;
arm7_9_common_t *arm7_9;
arm7_9->arm_bkpt = 0xdeeedeee;
arm7_9->thumb_bkpt = 0xdeee;
- arm7_9->sw_bkpts_use_wp = 1;
- arm7_9->sw_bkpts_enabled = 0;
arm7_9->dbgreq_adjust_pc = 3;
arm7_9->arch_info = arm9tdmi;
}
-/* target arm9tdmi <endianess> <startup_mode> <chain_pos> <variant>*/
-int arm9tdmi_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target)
+
+int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp)
{
- int chain_pos;
- char *variant = NULL;
- arm9tdmi_common_t *arm9tdmi = malloc(sizeof(arm9tdmi_common_t));
- memset(arm9tdmi, 0, sizeof(*arm9tdmi));
+ arm9tdmi_common_t *arm9tdmi = calloc(1,sizeof(arm9tdmi_common_t));
- if (argc < 4)
- {
- LOG_ERROR("'target arm9tdmi' requires at least one additional argument");
- exit(-1);
- }
-
- chain_pos = strtoul(args[3], NULL, 0);
-
- if (argc >= 5)
- variant = args[4];
-
- arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
+ arm9tdmi_init_arch_info(target, arm9tdmi, target->chain_position, target->variant);
return ERROR_OK;
}
register_command(cmd_ctx, arm9tdmi_cmd, "vector_catch", handle_arm9tdmi_catch_vectors_command, COMMAND_EXEC, "catch arm920t vectors ['all'|'none'|'<vec1 vec2 ...>']");
- return ERROR_OK;
+ return retval;
}