* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
+ * Copyright (C) 2008 by Spencer Oliver *
+ * spen@spen-soft.co.uk *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
int arm966e_register_commands(struct command_context_s *cmd_ctx);
/* forward declarations */
-int arm966e_deassert_reset(target_t *target);
-int arm966e_assert_reset(target_t *target);
-int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
+int arm966e_target_create(struct target_s *target, Jim_Interp *interp);
int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm966e_quit(void);
.poll = arm7_9_poll,
.arch_state = armv4_5_arch_state,
+ .target_request_data = arm7_9_target_request_data,
+
.halt = arm7_9_halt,
.resume = arm7_9_resume,
.step = arm7_9_step,
- .assert_reset = arm966e_assert_reset,
- .deassert_reset = arm966e_deassert_reset,
+ .assert_reset = arm7_9_assert_reset,
+ .deassert_reset = arm7_9_deassert_reset,
.soft_reset_halt = arm7_9_soft_reset_halt,
.get_gdb_reg_list = armv4_5_get_gdb_reg_list,
.read_memory = arm7_9_read_memory,
.write_memory = arm7_9_write_memory,
.bulk_write_memory = arm7_9_bulk_write_memory,
-
+ .checksum_memory = arm7_9_checksum_memory,
+ .blank_check_memory = arm7_9_blank_check_memory,
+
+ .run_algorithm = armv4_5_run_algorithm,
+
.add_breakpoint = arm7_9_add_breakpoint,
.remove_breakpoint = arm7_9_remove_breakpoint,
.add_watchpoint = arm7_9_add_watchpoint,
.remove_watchpoint = arm7_9_remove_watchpoint,
.register_commands = arm966e_register_commands,
- .target_command = arm966e_target_command,
+ .target_create = arm966e_target_create,
.init_target = arm966e_init_target,
+ .examine = arm9tdmi_examine,
.quit = arm966e_quit,
};
-int arm966e_assert_reset(target_t *target)
-{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm966e_common_t *arm966e = arm9tdmi->arch_info;
- reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
- int retval;
- int trst_asserted_with_srt = 0;
-
- arm966e->monitor_mode_set = 1;
-
- DEBUG("target->state: %s", target_state_strings[target->state]);
-
- if (target->state == TARGET_HALTED || target->state == TARGET_UNKNOWN)
- {
- /* assert SRST and TRST */
- /* system would get ouf sync if we didn't reset test-logic, too */
- if ((retval = jtag_add_reset(1, 1)) != ERROR_OK)
- {
- if (retval == ERROR_JTAG_RESET_CANT_SRST)
- {
- WARNING("can't assert srst");
- return retval;
- }
- else
- {
- ERROR("unknown error");
- exit(-1);
- }
- }
- jtag_add_sleep(5000);
- if ((retval = jtag_add_reset(0, 1)) != ERROR_OK)
- {
- if (retval == ERROR_JTAG_RESET_WOULD_ASSERT_TRST)
- {
- WARNING("srst resets test logic, too");
- retval = jtag_add_reset(1, 1);
- trst_asserted_with_srt = 1;
- }
- }
- }
- else
- {
- if ((retval = jtag_add_reset(0, 1)) != ERROR_OK)
- {
- if (retval == ERROR_JTAG_RESET_WOULD_ASSERT_TRST)
- {
- WARNING("srst resets test logic, too");
- retval = jtag_add_reset(1, 1);
- trst_asserted_with_srt = 1;
- }
-
- if (retval == ERROR_JTAG_RESET_CANT_SRST)
- {
- WARNING("can't assert srst");
- return retval;
- }
- else if (retval != ERROR_OK)
- {
- ERROR("unknown error");
- exit(-1);
- }
- }
- }
-
- target->state = TARGET_RESET;
- jtag_add_sleep(50000);
-
- armv4_5_invalidate_core_regs(target);
-
- if( trst_asserted_with_srt == 0 )
- {
- DEBUG("monitor mode needs clearing");
-
- /* arm9e monitor mode enabled at reset */
- embeddedice_read_reg(dbg_ctrl);
- jtag_execute_queue();
-
- if(buf_get_u32(dbg_ctrl->value, EICE_DBG_CONTROL_MONEN, 1))
- {
- buf_set_u32(dbg_ctrl->value, EICE_DBG_CONTROL_MONEN, 1, 0);
- embeddedice_store_reg(dbg_ctrl);
- DEBUG("monitor mode disabled");
- }
- arm966e->monitor_mode_set = 0;
- }
-
- return ERROR_OK;
-}
-
-int arm966e_deassert_reset(target_t *target)
-{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm966e_common_t *arm966e = arm9tdmi->arch_info;
- reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
-
- arm7_9_deassert_reset( target );
-
- if( arm966e->monitor_mode_set == 1 )
- {
- DEBUG("monitor mode needs clearing");
-
- /* arm9e monitor mode enabled at reset */
- embeddedice_read_reg(dbg_ctrl);
- jtag_execute_queue();
-
- if(buf_get_u32(dbg_ctrl->value, EICE_DBG_CONTROL_MONEN, 1))
- {
- buf_set_u32(dbg_ctrl->value, EICE_DBG_CONTROL_MONEN, 1, 0);
- embeddedice_store_reg(dbg_ctrl);
- arm966e->monitor_mode_set = 0;
- DEBUG("monitor mode disabled");
- }
- }
-
- return ERROR_OK;
-}
-
int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
{
arm9tdmi_init_target(cmd_ctx, target);
return ERROR_OK;
}
-int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, int chain_pos, char *variant)
+int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap, const char *variant)
{
arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
+ arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
- arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
+ arm9tdmi_init_arch_info(target, arm9tdmi, tap, variant);
arm9tdmi->arch_info = arm966e;
arm966e->common_magic = ARM966E_COMMON_MAGIC;
- arm9tdmi->has_single_step = 0;
- arm9tdmi->has_monitor_mode = 1;
+ /* The ARM966E-S implements the ARMv5TE architecture which
+ * has the BKPT instruction, so we don't have to use a watchpoint comparator
+ */
+ arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
+ arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
return ERROR_OK;
}
-int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target)
+int arm966e_target_create( struct target_s *target, Jim_Interp *interp )
{
- int chain_pos;
- char *variant = NULL;
- arm966e_common_t *arm966e = malloc(sizeof(arm966e_common_t));
+ arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t));
- if (argc < 4)
- {
- ERROR("'target arm966e' requires at least one additional argument");
- exit(-1);
- }
-
- chain_pos = strtoul(args[3], NULL, 0);
-
- if (argc >= 5)
- variant = args[4];
-
- DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
-
- arm966e_init_arch_info(target, arm966e, chain_pos, variant);
+ arm966e_init_arch_info(target, arm966e, target->tap, target->variant);
return ERROR_OK;
}
int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
{
+ int retval = ERROR_OK;
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
u8 nr_w_buf = 0;
jtag_add_end_state(TAP_RTI);
- arm_jtag_scann(jtag_info, 0xf);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+ if((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
+ {
+ return retval;
+ }
+ arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
- fields[0].device = jtag_info->chain_pos;
+ fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].out_mask = NULL;
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;
- fields[1].device = jtag_info->chain_pos;
+ fields[1].tap = jtag_info->tap;
fields[1].num_bits = 6;
fields[1].out_value = ®_addr_buf;
fields[1].out_mask = NULL;
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;
- fields[2].device = jtag_info->chain_pos;
+ fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = &nr_w_buf;
fields[2].out_mask = NULL;
jtag_add_dr_scan(3, fields, -1);
- fields[0].in_value = (u8*)value;
+ fields[0].in_handler_priv = value;
+ fields[0].in_handler = arm_jtag_buf_to_u32;
jtag_add_dr_scan(3, fields, -1);
+#ifdef _DEBUG_INSTRUCTION_EXECUTION_
+ if((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ return retval;
+ }
+ LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
+#endif
+
return ERROR_OK;
}
int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
{
+ int retval = ERROR_OK;
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[3];
u8 reg_addr_buf = reg_addr & 0x3f;
u8 nr_w_buf = 1;
+ u8 value_buf[4];
+
+ buf_set_u32(value_buf, 0, 32, value);
jtag_add_end_state(TAP_RTI);
- arm_jtag_scann(jtag_info, 0xf);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+ if((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
+ {
+ return retval;
+ }
+ arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
- fields[0].device = jtag_info->chain_pos;
+ fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
- fields[0].out_value = (u8*)&value;
+ fields[0].out_value = value_buf;
fields[0].out_mask = NULL;
fields[0].in_value = NULL;
fields[0].in_check_value = NULL;
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;
- fields[1].device = jtag_info->chain_pos;
+ fields[1].tap = jtag_info->tap;
fields[1].num_bits = 6;
fields[1].out_value = ®_addr_buf;
fields[1].out_mask = NULL;
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;
- fields[2].device = jtag_info->chain_pos;
+ fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = &nr_w_buf;
fields[2].out_mask = NULL;
jtag_add_dr_scan(3, fields, -1);
+#ifdef _DEBUG_INSTRUCTION_EXECUTION_
+ LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
+#endif
+
return ERROR_OK;
}
command_print(cmd_ctx, "couldn't access reg %i", address);
return ERROR_OK;
}
- jtag_execute_queue();
+ if((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ return retval;
+ }
command_print(cmd_ctx, "%i: %8.8x", address, value);
}
int retval;
command_t *arm966e_cmd;
- retval = arm7_9_register_commands(cmd_ctx);
+ retval = arm9tdmi_register_commands(cmd_ctx);
arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands");
register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]");
- return ERROR_OK;
+ return retval;
}
Code Review / openocd.git / blobdiff