.mmu = arm926ejs_mmu
};
-
int arm926ejs_catch_broken_irscan(u8 *captured, void *priv, scan_field_t *field)
{
/* The ARM926EJ-S' instruction register is 4 bits wide */
buf_set_u32(address_buf, 0, 14, address);
- jtag_add_end_state(TAP_RTI);
+ jtag_add_end_state(TAP_IDLE);
if((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
{
return retval;
}
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
- fields[0].device = jtag_info->chain_pos;
+ fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].out_mask = NULL;
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;
- fields[1].device = jtag_info->chain_pos;
+ fields[1].tap = jtag_info->tap;
fields[1].num_bits = 1;
fields[1].out_value = &access;
fields[1].out_mask = NULL;
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;
- fields[2].device = jtag_info->chain_pos;
+ fields[2].tap = jtag_info->tap;
fields[2].num_bits = 14;
fields[2].out_value = address_buf;
fields[2].out_mask = NULL;
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- fields[3].device = jtag_info->chain_pos;
+ fields[3].tap = jtag_info->tap;
fields[3].num_bits = 1;
fields[3].out_value = &nr_w_buf;
fields[3].out_mask = NULL;
buf_set_u32(address_buf, 0, 14, address);
buf_set_u32(value_buf, 0, 32, value);
- jtag_add_end_state(TAP_RTI);
+ jtag_add_end_state(TAP_IDLE);
if((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
{
return retval;
}
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
- fields[0].device = jtag_info->chain_pos;
+ fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = value_buf;
fields[0].out_mask = NULL;
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;
- fields[1].device = jtag_info->chain_pos;
+ fields[1].tap = jtag_info->tap;
fields[1].num_bits = 1;
fields[1].out_value = &access;
fields[1].out_mask = NULL;
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;
- fields[2].device = jtag_info->chain_pos;
+ fields[2].tap = jtag_info->tap;
fields[2].num_bits = 14;
fields[2].out_value = address_buf;
fields[2].out_mask = NULL;
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- fields[3].device = jtag_info->chain_pos;
+ fields[3].tap = jtag_info->tap;
fields[3].num_bits = 1;
fields[3].out_value = &nr_w_buf;
fields[3].out_mask = NULL;
default:
LOG_ERROR("BUG: unknown debug reason: 0x%x", debug_reason);
target->debug_reason = DBG_REASON_DBGRQ;
- /* if we fail here, we won't talk to the target and it will
+ /* if we fail here, we won't talk to the target and it will
* be reported to be in the halted state */
retval = ERROR_TARGET_FAILURE;
break;
LOG_DEBUG("D FSR: 0x%8.8x, D FAR: 0x%8.8x, I FSR: 0x%8.8x",
arm926ejs->d_fsr, arm926ejs->d_far, arm926ejs->i_fsr);
-
u32 cache_dbg_ctrl;
/* read-modify-write CP15 cache debug control register
arm926ejs->armv4_5_mmu.armv4_5_cache.i_cache_enabled = 0;
return target_call_event_callbacks(target, TARGET_EVENT_HALTED);
-
}
int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
arm9tdmi_init_target(cmd_ctx, target);
return ERROR_OK;
-
}
int arm926ejs_quit(void)
{
-
return ERROR_OK;
}
-int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, int chain_pos, const char *variant)
+int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap)
{
arm9tdmi_common_t *arm9tdmi = &arm926ejs->arm9tdmi_common;
arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
/* initialize arm9tdmi specific info (including arm7_9 and armv4_5)
*/
- arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
+ arm9tdmi_init_arch_info(target, arm9tdmi, tap);
arm9tdmi->arch_info = arm926ejs;
arm926ejs->common_magic = ARM926EJS_COMMON_MAGIC;
{
arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t));
- arm926ejs_init_arch_info(target, arm926ejs, target->chain_position, target->variant);
+ arm926ejs_init_arch_info(target, arm926ejs, target->tap);
return ERROR_OK;
}
return armv4_5_mmu_handle_mw_phys_command(cmd_ctx, cmd, args, argc, target, &arm926ejs->armv4_5_mmu);
}
+
static int arm926ejs_virt2phys(struct target_s *target, u32 virtual, u32 *physical)
{
int retval;