#include "arm926ejs.h"
#include "time_support.h"
#include "target_type.h"
+#include "register.h"
/*
return ERROR_TARGET_INVALID;
}
- armv4_5 = &arm926ejs->arm9tdmi_common.arm7_9_common.armv4_5_common;
+ armv4_5 = &arm926ejs->arm7_9_common.armv4_5_common;
LOG_USER("target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
"MMU: %s, D-Cache: %s, I-Cache: %s",
armv4_5_state_strings[armv4_5->core_state],
Jim_Nvp_value2name_simple(nvp_target_debug_reason,target->debug_reason)->name,
- armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
+ arm_mode_name(armv4_5->core_mode),
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32),
buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
state[arm926ejs->armv4_5_mmu.mmu_enabled],
int arm926ejs_init_arch_info(struct target *target, struct arm926ejs_common *arm926ejs,
struct jtag_tap *tap)
{
- struct arm9tdmi_common *arm9tdmi = &arm926ejs->arm9tdmi_common;
- struct arm7_9_common *arm7_9 = &arm9tdmi->arm7_9_common;
+ struct arm7_9_common *arm7_9 = &arm926ejs->arm7_9_common;
- /* initialize arm9tdmi specific info (including arm7_9 and armv4_5)
- */
- arm9tdmi_init_arch_info(target, arm9tdmi, tap);
+ /* initialize arm7/arm9 specific info (including armv4_5) */
+ arm9tdmi_init_arch_info(target, arm7_9, tap);
arm926ejs->common_magic = ARM926EJS_COMMON_MAGIC;
COMMAND_HANDLER(arm926ejs_handle_cp15_command)
{
int retval;
- struct target *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(CMD_CTX);
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
int opcode_1;
int opcode_2;
int CRn;
int CRm;
- if ((argc < 4) || (argc > 5))
+ if ((CMD_ARGC < 4) || (CMD_ARGC > 5))
{
- command_print(cmd_ctx, "usage: arm926ejs cp15 <opcode_1> <opcode_2> <CRn> <CRm> [value]");
+ command_print(CMD_CTX, "usage: arm926ejs cp15 <opcode_1> <opcode_2> <CRn> <CRm> [value]");
return ERROR_OK;
}
- COMMAND_PARSE_NUMBER(int, args[0], opcode_1);
- COMMAND_PARSE_NUMBER(int, args[1], opcode_2);
- COMMAND_PARSE_NUMBER(int, args[2], CRn);
- COMMAND_PARSE_NUMBER(int, args[3], CRm);
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], opcode_1);
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], opcode_2);
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], CRn);
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], CRm);
- retval = arm926ejs_verify_pointer(cmd_ctx, arm926ejs);
+ retval = arm926ejs_verify_pointer(CMD_CTX, arm926ejs);
if (retval != ERROR_OK)
return retval;
if (target->state != TARGET_HALTED)
{
- command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
+ command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
- if (argc == 4)
+ if (CMD_ARGC == 4)
{
uint32_t value;
if ((retval = arm926ejs->read_cp15(target, opcode_1, opcode_2, CRn, CRm, &value)) != ERROR_OK)
{
- command_print(cmd_ctx, "couldn't access register");
+ command_print(CMD_CTX, "couldn't access register");
return ERROR_OK;
}
if ((retval = jtag_execute_queue()) != ERROR_OK)
return retval;
}
- command_print(cmd_ctx, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value);
+ command_print(CMD_CTX, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value);
}
else
{
uint32_t value;
- COMMAND_PARSE_NUMBER(u32, args[4], value);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[4], value);
if ((retval = arm926ejs->write_cp15(target, opcode_1, opcode_2, CRn, CRm, value)) != ERROR_OK)
{
- command_print(cmd_ctx, "couldn't access register");
+ command_print(CMD_CTX, "couldn't access register");
return ERROR_OK;
}
- command_print(cmd_ctx, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value);
+ command_print(CMD_CTX, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value);
}
return ERROR_OK;
COMMAND_HANDLER(arm926ejs_handle_cache_info_command)
{
int retval;
- struct target *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(CMD_CTX);
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
- retval = arm926ejs_verify_pointer(cmd_ctx, arm926ejs);
+ retval = arm926ejs_verify_pointer(CMD_CTX, arm926ejs);
if (retval != ERROR_OK)
return retval;
- return armv4_5_handle_cache_info_command(cmd_ctx, &arm926ejs->armv4_5_mmu.armv4_5_cache);
+ return armv4_5_handle_cache_info_command(CMD_CTX, &arm926ejs->armv4_5_mmu.armv4_5_cache);
}
static int arm926ejs_virt2phys(struct target *target, uint32_t virtual, uint32_t *physical)
.read_memory = arm7_9_read_memory,
.write_memory = arm926ejs_write_memory,
.bulk_write_memory = arm7_9_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
+
+ .checksum_memory = arm_checksum_memory,
+ .blank_check_memory = arm_blank_check_memory,
.run_algorithm = armv4_5_run_algorithm,
.register_commands = arm926ejs_register_commands,
.target_create = arm926ejs_target_create,
.init_target = arm9tdmi_init_target,
- .examine = arm9tdmi_examine,
+ .examine = arm7_9_examine,
.virt2phys = arm926ejs_virt2phys,
.mmu = arm926ejs_mmu,