MinGW build fixes

[openocd.git] / src / target / arm920t.c

diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 17e7a55ae4429e74f529a78cdedb976d246e64b5..c5b7c88dcdca3fea2dfe171b1bfc494c474280da 100644 (file)
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -22,9 +22,10 @@
 #endif
 
 #include "arm920t.h"
-#include "time_support.h"
+#include <helper/time_support.h>
 #include "target_type.h"
 #include "register.h"
+#include "arm_opcodes.h"
 
 
 /*
@@ -212,7 +213,7 @@ static int arm920t_execute_cp15(struct target *target, uint32_t cp15_opcode,
 static int arm920t_read_cp15_interpreted(struct target *target,
                uint32_t cp15_opcode, uint32_t address, uint32_t *value)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        uint32_t* regs_p[1];
        uint32_t regs[2];
        uint32_t cp15c15 = 0x0;
@@ -259,7 +260,7 @@ int arm920t_write_cp15_interpreted(struct target *target,
                uint32_t cp15_opcode, uint32_t value, uint32_t address)
 {
        uint32_t cp15c15 = 0x0;
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        uint32_t regs[2];
        struct reg *r = armv4_5->core_cache->reg_list;
 
@@ -448,14 +449,8 @@ int arm920t_arch_state(struct target *target)
 
        armv4_5 = &arm920t->arm7_9_common.armv4_5_common;
 
-       LOG_USER("target halted in %s state due to %s, current mode: %s\n"
-                       "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
-                       "MMU: %s, D-Cache: %s, I-Cache: %s",
-                        armv4_5_state_strings[armv4_5->core_state],
-                        Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name,
-                        arm_mode_name(armv4_5->core_mode),
-                        buf_get_u32(armv4_5->cpsr->value, 0, 32),
-                        buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
+       arm_arch_state(target);
+       LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
                         state[arm920t->armv4_5_mmu.mmu_enabled],
                         state[arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
                         state[arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
@@ -1352,7 +1347,10 @@ COMMAND_HANDLER(arm920t_handle_cache_info_command)
 }
 
 
-static int arm920t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int arm920t_mrc(struct target *target, int cpnum,
+               uint32_t op1, uint32_t op2,
+               uint32_t CRn, uint32_t CRm,
+               uint32_t *value)
 {
        if (cpnum!=15)
        {
@@ -1360,10 +1358,16 @@ static int arm920t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t
                return ERROR_FAIL;
        }
 
-       return arm920t_read_cp15_interpreted(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), 0, value);
+       /* read "to" r0 */
+       return arm920t_read_cp15_interpreted(target,
+                       ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2),
+                       0, value);
 }
 
-static int arm920t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int arm920t_mcr(struct target *target, int cpnum,
+               uint32_t op1, uint32_t op2,
+               uint32_t CRn, uint32_t CRm,
+               uint32_t value)
 {
        if (cpnum!=15)
        {
@@ -1371,7 +1375,10 @@ static int arm920t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t
                return ERROR_FAIL;
        }
 
-       return arm920t_write_cp15_interpreted(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), 0, value);
+       /* write "from" r0 */
+       return arm920t_write_cp15_interpreted(target,
+                       ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2),
+                       0, value);
 }
 
 static const struct command_registration arm920t_exec_command_handlers[] = {
@@ -1440,7 +1447,7 @@ struct target_type arm920t_target =
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm920t_soft_reset_halt,
 
-       .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+       .get_gdb_reg_list = arm_get_gdb_reg_list,
 
        .read_memory = arm920t_read_memory,
        .write_memory = arm920t_write_memory,