- reformat src/jtag/bitq.c (thanks to Pavel Chromy)

[openocd.git] / src / target / arm920t.c

diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 97a08811ebd725cc80d5e57f8c10c170a63862eb..1bcca0ad2e4bb161fe7772a893835627de7c50b4 100644 (file)
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -70,6 +70,7 @@ target_type_t arm920t_target =
        .assert_reset = arm7_9_assert_reset,
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm920t_soft_reset_halt,
+       .prepare_reset_halt = arm7_9_prepare_reset_halt,
        
        .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
 
@@ -102,7 +103,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
        
        jtag_add_end_state(TAP_RTI);
        arm_jtag_scann(jtag_info, 0xf);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 1;
@@ -144,12 +145,12 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
        fields[3].in_handler = NULL;
        fields[3].in_handler_priv = NULL;
        
-       jtag_add_dr_scan(4, fields, -1);
+       jtag_add_dr_scan(4, fields, -1, NULL);
 
        fields[1].in_handler_priv = value;
        fields[1].in_handler = arm_jtag_buf_to_u32;
 
-       jtag_add_dr_scan(4, fields, -1);
+       jtag_add_dr_scan(4, fields, -1, NULL);
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        jtag_execute_queue();
@@ -174,7 +175,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
        
        jtag_add_end_state(TAP_RTI);
        arm_jtag_scann(jtag_info, 0xf);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 1;
@@ -216,7 +217,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
        fields[3].in_handler = NULL;
        fields[3].in_handler_priv = NULL;
        
-       jtag_add_dr_scan(4, fields, -1);
+       jtag_add_dr_scan(4, fields, -1, NULL);
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
@@ -238,7 +239,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
        
        jtag_add_end_state(TAP_RTI);
        arm_jtag_scann(jtag_info, 0xf);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
        
        buf_set_u32(cp15_opcode_buf, 0, 32, cp15_opcode);
 
@@ -282,7 +283,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
        fields[3].in_handler = NULL;
        fields[3].in_handler_priv = NULL;
 
-       jtag_add_dr_scan(4, fields, -1);
+       jtag_add_dr_scan(4, fields, -1, NULL);
 
        arm9tdmi_clock_out(jtag_info, arm_opcode, 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
@@ -625,7 +626,7 @@ int arm920t_soft_reset_halt(struct target_s *target)
                target->type->halt(target);
        }
        
-       while (buf_get_u32(dbg_stat->value, EICE_DBG_CONTROL_DBGACK, 1) == 0)
+       while (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0)
        {
                embeddedice_read_reg(dbg_stat);
                jtag_execute_queue();
@@ -701,7 +702,7 @@ int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, int chai
        arm920t->preserve_cache = 0;
        
        /* override hw single-step capability from ARM9TDMI */
-       arm9tdmi->has_single_step = 1;
+       arm7_9->has_single_step = 1;
        
        return ERROR_OK;
 }