Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
- added patch to fix crash in load_image on corrupt elf file or out of memory.
[openocd.git] / src / target / arm7tdmi.c
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 0a6caeac152591ee7c599f6b9cd9097f64387b42..9a9a2450595ba0a85e87a19e90e81ee8d174e2a5 100644 (file)
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -59,6 +59,8 @@ target_type_t arm7tdmi_target =
        .poll = arm7_9_poll,
        .arch_state = armv4_5_arch_state,
 
+       .target_request_data = arm7_9_target_request_data,
+
        .halt = arm7_9_halt,
        .resume = arm7_9_resume,
        .step = arm7_9_step,
@@ -66,13 +68,15 @@ target_type_t arm7tdmi_target =
        .assert_reset = arm7_9_assert_reset,
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm7_9_soft_reset_halt,
+       .prepare_reset_halt = arm7_9_prepare_reset_halt,
 
        .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
        
        .read_memory = arm7_9_read_memory,
        .write_memory = arm7_9_write_memory,
        .bulk_write_memory = arm7_9_bulk_write_memory,
-
+       .checksum_memory = arm7_9_checksum_memory,
+       
        .run_algorithm = armv4_5_run_algorithm,
        
        .add_breakpoint = arm7_9_add_breakpoint,
@@ -123,9 +127,9 @@ int arm7tdmi_examine_debug_reason(target_t *target)
                fields[1].in_handler_priv = NULL;
                
                arm_jtag_scann(&arm7_9->jtag_info, 0x1);
-               arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr);
+               arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
 
-               jtag_add_dr_scan(2, fields, TAP_PD);
+               jtag_add_dr_scan(2, fields, TAP_PD, NULL);
                jtag_execute_queue();
                
                fields[0].in_value = NULL;
@@ -133,7 +137,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
                fields[1].in_value = NULL;
                fields[1].out_value = databus;
                
-               jtag_add_dr_scan(2, fields, TAP_PD);
+               jtag_add_dr_scan(2, fields, TAP_PD, NULL);
 
                if (breakpoint & 1)
                        target->debug_reason = DBG_REASON_WATCHPOINT; 
@@ -156,7 +160,7 @@ int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *in, int breakpoint)
 
        jtag_add_end_state(TAP_PD);
        arm_jtag_scann(jtag_info, 0x1);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
        
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 1;
@@ -186,7 +190,7 @@ int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *in, int breakpoint)
        fields[1].in_check_value = NULL;
        fields[1].in_check_mask = NULL;
 
-       jtag_add_dr_scan(2, fields, -1);
+       jtag_add_dr_scan(2, fields, -1, NULL);
 
        jtag_add_runtest(0, -1);
        
@@ -213,7 +217,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 
        jtag_add_end_state(TAP_PD);
        arm_jtag_scann(jtag_info, 0x1);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
        
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 1;
@@ -235,7 +239,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
        fields[1].in_check_value = NULL;
        fields[1].in_check_mask = NULL;
 
-       jtag_add_dr_scan(2, fields, -1);
+       jtag_add_dr_scan(2, fields, -1, NULL);
 
        jtag_add_runtest(0, -1);
        
@@ -267,7 +271,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
 
        jtag_add_end_state(TAP_PD);
        arm_jtag_scann(jtag_info, 0x1);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
        
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 1;
@@ -300,7 +304,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
        fields[1].in_check_value = NULL;
        fields[1].in_check_mask = NULL;
 
-       jtag_add_dr_scan(2, fields, -1);
+       jtag_add_dr_scan(2, fields, -1, NULL);
 
        jtag_add_runtest(0, -1);
        
@@ -347,8 +351,14 @@ void arm7tdmi_change_to_arm(target_t *target, u32 *r0, u32 *pc)
        /* nothing fetched, STR r0, [r0] in Execute (2) */
        arm7tdmi_clock_data_in(jtag_info, pc);
 
-       /* fetch MOV */
-       arm7tdmi_clock_out(jtag_info, ARMV4_5_T_MOV_IM(0, 0x0), NULL, 0);
+       /* use pc-relative LDR to clear r0[1:0] (for switch to ARM mode) */
+       arm7tdmi_clock_out(jtag_info, ARMV4_5_T_LDR_PCREL(0), NULL, 0);
+       arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 0);
+       arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 0);
+       /* nothing fetched, data for LDR r0, [PC, #0] */
+       arm7tdmi_clock_out(jtag_info, 0x0, NULL, 0);
+       /* nothing fetched, data from previous cycle is written to register */
+       arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 0);
        
        /* fetch BX */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_T_BX(0), NULL, 0);
@@ -663,7 +673,7 @@ void arm7tdmi_branch_resume(target_t *target)
 
 void arm7tdmi_branch_resume_thumb(target_t *target)
 {
-       DEBUG("");
+       DEBUG("-");
        
        /* get pointers to arch-specific information */
        armv4_5_common_t *armv4_5 = target->arch_info;
@@ -702,11 +712,9 @@ void arm7tdmi_branch_resume_thumb(target_t *target)
        /* target is now in Thumb state */
        embeddedice_read_reg(dbg_stat);
 
-       /* clean r0 bits to avoid alignment problems */
-       arm7tdmi_clock_out(jtag_info, ARMV4_5_T_MOV_IM(0, 0x0), NULL, 0);
-       /* load r0 value, MOV_IM in Decode*/
-       arm7tdmi_clock_out(jtag_info, ARMV4_5_T_LDR(0, 0), NULL, 0);
-       /* fetch NOP, LDR in Decode, MOV_IM in Execute */
+       /* load r0 value */
+       arm7tdmi_clock_out(jtag_info, ARMV4_5_T_LDR_PCREL(0), NULL, 0);
+       /* fetch NOP, LDR in Decode */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 0);
        /* fetch NOP, LDR in Execute */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 0);
@@ -721,7 +729,7 @@ void arm7tdmi_branch_resume_thumb(target_t *target)
        embeddedice_read_reg(dbg_stat);
        
        arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 1);
-       arm7tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f7), NULL, 0);
+       arm7tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f8), NULL, 0);
 
 }
                
@@ -732,28 +740,18 @@ void arm7tdmi_build_reg_cache(target_t *target)
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        arm_jtag_t *jtag_info = &arm7_9->jtag_info;
-       arm7tdmi_common_t *arch_info = arm7_9->arch_info;
-
 
        (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
        armv4_5->core_cache = (*cache_p);
        
-       (*cache_p)->next = embeddedice_build_reg_cache(target, jtag_info, 0);
+       (*cache_p)->next = embeddedice_build_reg_cache(target, arm7_9);
        arm7_9->eice_cache = (*cache_p)->next;
        
-       if (arm7_9->has_etm)
+       if (arm7_9->etm_ctx)
        {
-               (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, 0);
-               arm7_9->etm_cache = (*cache_p)->next->next;
+               (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
+               arm7_9->etm_ctx->reg_cache = (*cache_p)->next->next;
        }
-               
-       if (arch_info->has_monitor_mode)
-               (*cache_p)->next->reg_list[EICE_DBG_CTRL].size = 6;
-       else
-               (*cache_p)->next->reg_list[EICE_DBG_CTRL].size = 3;
-       
-       (*cache_p)->next->reg_list[EICE_DBG_STAT].size = 5;
-
 }
 
 int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
@@ -775,7 +773,6 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, int c
 {
        armv4_5_common_t *armv4_5;
        arm7_9_common_t *arm7_9;
-       int has_etm = 0;
        
        arm7_9 = &arm7tdmi->arm7_9_common;
        armv4_5 = &arm7_9->armv4_5_common;
@@ -817,37 +814,27 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, int c
        arm7_9->post_restore_context = NULL;
        
        /* initialize arch-specific breakpoint handling */
-       buf_set_u32((u8*)(&arm7_9->arm_bkpt), 0, 32, 0xdeeedeee);
-       buf_set_u32((u8*)(&arm7_9->thumb_bkpt), 0, 16, 0xdeee);
+       arm7_9->arm_bkpt = 0xdeeedeee;
+       arm7_9->thumb_bkpt = 0xdeee;
        
        arm7_9->sw_bkpts_use_wp = 1;
        arm7_9->sw_bkpts_enabled = 0;
        arm7_9->dbgreq_adjust_pc = 2;
        arm7_9->arch_info = arm7tdmi;
-       
-       arm7tdmi->has_monitor_mode = 0;
+
        arm7tdmi->arch_info = NULL;
        arm7tdmi->common_magic = ARM7TDMI_COMMON_MAGIC;
        
        if (variant)
        {
-               if (strcmp(variant, "arm7tdmi-s_r4") == 0)
-                       arm7tdmi->has_monitor_mode = 1;
-               else if (strcmp(variant, "arm7tdmi_r4") == 0)
-                       arm7tdmi->has_monitor_mode = 1;
-               else if (strcmp(variant, "lpc2000") == 0)
-               {
-                       arm7tdmi->has_monitor_mode = 1;
-                       has_etm = 1;
-               }
                arm7tdmi->variant = strdup(variant);
        }
        else
+       {
                arm7tdmi->variant = strdup("");
+       }
        
        arm7_9_init_arch_info(target, arm7_9);
-       
-       arm7_9->has_etm = has_etm;
 
        return ERROR_OK;
 }
@@ -865,7 +852,7 @@ int arm7tdmi_target_command(struct command_context_s *cmd_ctx, char *cmd, char *
                exit(-1);
        }
        
-       chain_pos = strtoul(args[2], NULL, 0);
+       chain_pos = strtoul(args[3], NULL, 0);
        
        if (argc >= 5)
                variant = args[4];
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)