Rename jtag_add_end_state to jtag_set_end_state since "add" implies that

[openocd.git] / src / target / arm7tdmi.c

diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 116109d37fb5d9aaf4231ec1cad4ef34fb220d26..0c4094ed89c4b9fb98855748d2fe09cde9bf8129 100644 (file)
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -28,6 +28,7 @@
 #endif
 
 #include "arm7tdmi.h"
+#include "target_type.h"
 
 
 #if 0
@@ -97,7 +98,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
                u8 databus[4];
                u8 breakpoint;
 
-               jtag_add_end_state(TAP_DRPAUSE);
+               jtag_set_end_state(TAP_DRPAUSE);
 
                fields[0].tap = arm7_9->jtag_info.tap;
                fields[0].num_bits = 1;
@@ -115,7 +116,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
                }
                arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
 
-               jtag_add_dr_scan(2, fields, TAP_DRPAUSE);
+               jtag_add_dr_scan(2, fields, jtag_set_end_state(TAP_DRPAUSE));
                if((retval = jtag_execute_queue()) != ERROR_OK)
                {
                        return retval;
@@ -126,7 +127,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
                fields[1].in_value = NULL;
                fields[1].out_value = databus;
 
-               jtag_add_dr_scan(2, fields, TAP_DRPAUSE);
+               jtag_add_dr_scan(2, fields, jtag_set_end_state(TAP_DRPAUSE));
 
                if (breakpoint & 1)
                        target->debug_reason = DBG_REASON_WATCHPOINT;
@@ -146,9 +147,9 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, u32 out, int
                        2,
                        arm7tdmi_num_bits,
                        values,
-                       TAP_INVALID);
+                       jtag_get_end_state());
 
-       jtag_add_runtest(0, TAP_INVALID);
+       jtag_add_runtest(0, jtag_get_end_state());
 
        return ERROR_OK;
 }
@@ -156,7 +157,7 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, u32 out, int
 /* put an instruction in the ARM7TDMI pipeline or write the data bus, and optionally read data */
 static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *deprecated, int breakpoint)
 {
-       jtag_add_end_state(TAP_DRPAUSE);
+       jtag_set_end_state(TAP_DRPAUSE);
        arm_jtag_scann(jtag_info, 0x1);
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
@@ -169,7 +170,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
        int retval = ERROR_OK;
        scan_field_t fields[2];
 
-       jtag_add_end_state(TAP_DRPAUSE);
+       jtag_set_end_state(TAP_DRPAUSE);
        if((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
        {
                return retval;
@@ -184,17 +185,13 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 32;
        fields[1].out_value = NULL;
-       u8 tmp[4];
-       fields[1].in_value = tmp;
+       fields[1].in_value = (u8 *)in;
 
-       jtag_add_dr_scan_now(2, fields, TAP_INVALID);
+       jtag_add_dr_scan(2, fields, jtag_get_end_state());
 
-       if (jtag_error==ERROR_OK)
-       {
-               *in=flip_u32(le_to_h_u32(tmp), 32);
-       }
+       jtag_add_callback(arm7flip32, (u8 *)in);
 
-       jtag_add_runtest(0, TAP_INVALID);
+       jtag_add_runtest(0, jtag_get_end_state());
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 {
@@ -246,7 +243,12 @@ void arm_endianness(u8 *tmp, void *in, int size, int be, int flip)
                        *((u8 *)in)= readback & 0xff;
                        break;
        }
+}
 
+static int arm7endianness(u8 *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+{
+       arm_endianness((u8 *)captured, in, (int)size, (int)be, 1);
+       return ERROR_OK;
 }
 
 /* clock the target, and read the databus
@@ -258,7 +260,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
        int retval = ERROR_OK;
        scan_field_t fields[2];
 
-       jtag_add_end_state(TAP_DRPAUSE);
+       jtag_set_end_state(TAP_DRPAUSE);
        if((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
        {
                return retval;
@@ -273,14 +275,13 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 32;
        fields[1].out_value = NULL;
-       u8 tmp[4];
-       fields[1].in_value = tmp;
+       jtag_alloc_in_value32(&fields[1]);
 
-       jtag_add_dr_scan_now(2, fields, TAP_INVALID);
+       jtag_add_dr_scan(2, fields, jtag_get_end_state());
 
-       arm_endianness(tmp, in, size, be, 1);
+       jtag_add_callback4(arm7endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value);
 
-       jtag_add_runtest(0, TAP_INVALID);
+       jtag_add_runtest(0, jtag_get_end_state());
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 {
@@ -718,7 +719,7 @@ int arm7tdmi_examine(struct target_s *target)
        int retval;
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
-       if (!target->type->examined)
+       if (!target_was_examined(target))
        {
                /* get pointers to arch-specific information */
                reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
@@ -735,7 +736,7 @@ int arm7tdmi_examine(struct target_s *target)
                        (*cache_p)->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
                        arm7_9->etm_ctx->reg_cache = (*cache_p)->next;
                }
-               target->type->examined = 1;
+               target_set_examined(target);
        }
        if ((retval=embeddedice_setup(target))!=ERROR_OK)
                return retval;