Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
Use enum for target_register_timer_callback()
[openocd.git] / src / target / arm7_9_common.c
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 7b40f5057e6bd6c9de0a83985c81b3c4bd56f30e..96e31b9d3377f2ba50fff29c2cf80019a74188d2 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -24,9 +24,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -103,7 +101,8 @@ static void arm7_9_assign_wp(struct arm7_9_common *arm7_9, struct breakpoint *br
                arm7_9->wp_available--;
        } else
                LOG_ERROR("BUG: no hardware comparator available");
-       LOG_DEBUG("BPID: %" PRId32 " (0x%08" PRIx32 ") using hw wp: %d",
+
+       LOG_DEBUG("BPID: %" PRId32 " (0x%08" TARGET_PRIxADDR ") using hw wp: %d",
                        breakpoint->unique_id,
                        breakpoint->address,
                        breakpoint->set);
@@ -189,7 +188,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        int retval = ERROR_OK;
 
-       LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" PRIx32 ", Type: %d",
+       LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" TARGET_PRIxADDR ", Type: %d",
                breakpoint->unique_id,
                breakpoint->address,
                breakpoint->type);
@@ -246,7 +245,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
                        if (retval != ERROR_OK)
                                return retval;
                        if (verify != arm7_9->arm_bkpt) {
-                               LOG_ERROR("Unable to set 32 bit software breakpoint at address %08" PRIx32
+                               LOG_ERROR("Unable to set 32 bit software breakpoint at address %08" TARGET_PRIxADDR
                                                " - check that memory is read/writable", breakpoint->address);
                                return ERROR_OK;
                        }
@@ -266,7 +265,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
                        if (retval != ERROR_OK)
                                return retval;
                        if (verify != arm7_9->thumb_bkpt) {
-                               LOG_ERROR("Unable to set thumb software breakpoint at address %08" PRIx32
+                               LOG_ERROR("Unable to set thumb software breakpoint at address %08" TARGET_PRIxADDR
                                                " - check that memory is read/writable", breakpoint->address);
                                return ERROR_OK;
                        }
@@ -301,7 +300,7 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre
        int retval = ERROR_OK;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
-       LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" PRIx32,
+       LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" TARGET_PRIxADDR,
                breakpoint->unique_id,
                breakpoint->address);
 
@@ -350,12 +349,12 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre
                        if (retval != ERROR_OK)
                                return retval;
                        current_instr = target_buffer_get_u16(target, (uint8_t *)&current_instr);
-                       if (current_instr == arm7_9->thumb_bkpt)
+                       if (current_instr == arm7_9->thumb_bkpt) {
                                retval = target_write_memory(target,
                                                breakpoint->address, 2, 1, breakpoint->orig_instr);
                                if (retval != ERROR_OK)
                                        return retval;
-
+                       }
                }
 
                if (--arm7_9->sw_breakpoint_count == 0) {
@@ -636,8 +635,8 @@ int arm7_9_execute_sys_speed(struct target *target)
        if (retval != ERROR_OK)
                return retval;
 
-       long long then = timeval_ms();
-       int timeout;
+       int64_t then = timeval_ms();
+       bool timeout;
        while (!(timeout = ((timeval_ms()-then) > 1000))) {
                /* read debug status register */
                embeddedice_read_reg(dbg_stat);
@@ -875,6 +874,13 @@ int arm7_9_assert_reset(struct target *target)
        enum reset_types jtag_reset_config = jtag_get_reset_config();
        bool use_event = false;
 
+       /* TODO: apply hw reset signal in not examined state */
+       if (!(target_was_examined(target))) {
+               LOG_WARNING("Reset is not asserted because the target is not examined.");
+               LOG_WARNING("Use a reset button or power cycle the target.");
+               return ERROR_TARGET_NOT_EXAMINED;
+       }
+
        LOG_DEBUG("target->state: %s", target_state_name(target));
 
        if (target_has_event_action(target, TARGET_EVENT_RESET_ASSERT))
@@ -1687,7 +1693,7 @@ static void arm7_9_enable_breakpoints(struct target *target)
 
 int arm7_9_resume(struct target *target,
        int current,
-       uint32_t address,
+       target_addr_t address,
        int handle_breakpoints,
        int debug_execution)
 {
@@ -1719,7 +1725,7 @@ int arm7_9_resume(struct target *target,
                breakpoint = breakpoint_find(target,
                                buf_get_u32(arm->pc->value, 0, 32));
                if (breakpoint != NULL) {
-                       LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (id: %" PRId32,
+                       LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR " (id: %" PRId32,
                                breakpoint->address,
                                breakpoint->unique_id);
                        retval = arm7_9_unset_breakpoint(target, breakpoint);
@@ -1778,7 +1784,7 @@ int arm7_9_resume(struct target *target,
                        LOG_DEBUG("new PC after step: 0x%8.8" PRIx32,
                                buf_get_u32(arm->pc->value, 0, 32));
 
-                       LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
+                       LOG_DEBUG("set breakpoint at 0x%8.8" TARGET_PRIxADDR "", breakpoint->address);
                        retval = arm7_9_set_breakpoint(target, breakpoint);
                        if (retval != ERROR_OK)
                                return retval;
@@ -1889,7 +1895,7 @@ void arm7_9_disable_eice_step(struct target *target)
        embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE]);
 }
 
-int arm7_9_step(struct target *target, int current, uint32_t address, int handle_breakpoints)
+int arm7_9_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        struct arm *arm = &arm7_9->arm;
@@ -2089,7 +2095,7 @@ static int arm7_9_write_core_reg(struct target *target, struct reg *r,
 }
 
 int arm7_9_read_memory(struct target *target,
-       uint32_t address,
+       target_addr_t address,
        uint32_t size,
        uint32_t count,
        uint8_t *buffer)
@@ -2104,7 +2110,7 @@ int arm7_9_read_memory(struct target *target,
        int retval;
        int last_reg = 0;
 
-       LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
+       LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
                address, size, count);
 
        if (target->state != TARGET_HALTED) {
@@ -2242,7 +2248,8 @@ int arm7_9_read_memory(struct target *target,
 
        if (((cpsr & 0x1f) == ARM_MODE_ABT) && (arm->core_mode != ARM_MODE_ABT)) {
                LOG_WARNING(
-                       "memory read caused data abort (address: 0x%8.8" PRIx32 ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
+                       "memory read caused data abort "
+                       "(address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
                        address,
                        size,
                        count);
@@ -2258,7 +2265,7 @@ int arm7_9_read_memory(struct target *target,
 }
 
 int arm7_9_write_memory(struct target *target,
-       uint32_t address,
+       target_addr_t address,
        uint32_t size,
        uint32_t count,
        const uint8_t *buffer)
@@ -2455,7 +2462,8 @@ int arm7_9_write_memory(struct target *target,
 
        if (((cpsr & 0x1f) == ARM_MODE_ABT) && (arm->core_mode != ARM_MODE_ABT)) {
                LOG_WARNING(
-                       "memory write caused data abort (address: 0x%8.8" PRIx32 ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
+                       "memory write caused data abort "
+                       "(address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
                        address,
                        size,
                        count);
@@ -2471,7 +2479,7 @@ int arm7_9_write_memory(struct target *target,
 }
 
 int arm7_9_write_memory_opt(struct target *target,
-       uint32_t address,
+       target_addr_t address,
        uint32_t size,
        uint32_t count,
        const uint8_t *buffer)
@@ -2571,7 +2579,7 @@ static const uint32_t dcc_code[] = {
 };
 
 int arm7_9_bulk_write_memory(struct target *target,
-       uint32_t address,
+       target_addr_t address,
        uint32_t count,
        const uint8_t *buffer)
 {
@@ -2627,7 +2635,7 @@ int arm7_9_bulk_write_memory(struct target *target,
                uint32_t endaddress = buf_get_u32(reg_params[0].value, 0, 32);
                if (endaddress != (address + count*4)) {
                        LOG_ERROR(
-                               "DCC write failed, expected end address 0x%08" PRIx32 " got 0x%0" PRIx32 "",
+                               "DCC write failed, expected end address 0x%08" TARGET_PRIxADDR " got 0x%0" PRIx32 "",
                                (address + count*4),
                                endaddress);
                        retval = ERROR_FAIL;
@@ -2851,7 +2859,7 @@ int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9)
                return retval;
 
        return target_register_timer_callback(arm7_9_handle_target_request,
-               1, 1, target);
+               1, TARGET_TIMER_TYPE_PERIODIC, target);
 }
 
 static const struct command_registration arm7_9_any_command_handlers[] = {
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)