- added configurable delays after reset lines get deasserted. useful if reset circuit...

[openocd.git] / src / target / arm7_9_common.c

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index d167041f820c782bd20cb98d4b41e8a390602277..6bb801254f05ca330f94a9f7e0984cdd1f9da12c 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -17,7 +17,11 @@
  *   Free Software Foundation, Inc.,                                       *
  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
+#ifdef HAVE_CONFIG_H
 #include "config.h"
+#endif
+
+#include "replacements.h"
 
 #include "embeddedice.h"
 #include "target.h"
@@ -186,7 +190,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                else
                {
                        target->type->read_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr);
-                       target->type->read_memory(target, breakpoint->address, 2, 1, (u8*)(&arm7_9->arm_bkpt));
+                       target->type->write_memory(target, breakpoint->address, 2, 1, (u8*)(&arm7_9->thumb_bkpt));
                }
                breakpoint->set = 1;
        }
@@ -300,7 +304,8 @@ int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                arm7_9_unset_breakpoint(target, breakpoint);
        }
        
-       arm7_9->wp_available++;
+       if (breakpoint->type == BKPT_HARD)
+               arm7_9->wp_available++;
        
        return ERROR_OK;
 }
@@ -452,11 +457,12 @@ int arm7_9_enable_sw_bkpts(struct target_s *target)
        if (arm7_9->sw_bkpts_enabled)
                return ERROR_OK;
        
-       if (arm7_9->wp_available-- < 1)
+       if (arm7_9->wp_available < 1)
        {
                WARNING("can't enable sw breakpoints with no watchpoint unit available");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
+       arm7_9->wp_available--;
        
        if (!arm7_9->wp0_used)
        {
@@ -780,6 +786,12 @@ int arm7_9_halt(target_t *target)
        {
                WARNING("target was in unknown state when halt was requested");
        }
+       
+       if ((target->state == TARGET_RESET) && (jtag_reset_config & RESET_SRST_PULLS_TRST) && (jtag_srst))
+       {
+               ERROR("can't request a halt while in reset if nSRST pulls nTRST");
+               return ERROR_TARGET_FAILURE;
+       }
 
        if (arm7_9->use_dbgrq)
        {
@@ -1610,9 +1622,6 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
        u32 *reg_p[16];
        int num_accesses = 0;
        int thisrun_accesses;
-       u32 *buf32;
-       u16 *buf16;
-       u8 *buf8;
        int i;
        u32 cpsr;
        int retval;
@@ -1645,7 +1654,6 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
        switch (size)
        {
                case 4:
-                       buf32 = (u32*)buffer;
                        while (num_accesses < count)
                        {
                                u32 reg_list;
@@ -1662,13 +1670,13 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
                                {
                                        if (i > last_reg)
                                                last_reg = i;
-                                       *(buf32++) = reg[i];
+                                       target_buffer_set_u32(target, buffer, reg[i]);
+                                       buffer += 4;
                                }
                                num_accesses += thisrun_accesses;
                        }       
                        break;
                case 2:
-                       buf16 = (u16*)buffer;
                        while (num_accesses < count)
                        {
                                u32 reg_list;
@@ -1688,13 +1696,13 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
                                
                                for (i = 1; i <= thisrun_accesses; i++)
                                {
-                                       *(buf16++) = reg[i] & 0xffff;
+                                       target_buffer_set_u16(target, buffer, reg[i]);
+                                       buffer += 2;
                                }
                                num_accesses += thisrun_accesses;
                        }       
                        break;
                case 1:
-                       buf8 = buffer;
                        while (num_accesses < count)
                        {
                                u32 reg_list;
@@ -1714,7 +1722,7 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
                                
                                for (i = 1; i <= thisrun_accesses; i++)
                                {
-                                       *(buf8++) = reg[i] & 0xff;
+                                       *(buffer++) = reg[i] & 0xff;
                                }
                                num_accesses += thisrun_accesses;
                        }       
@@ -1755,9 +1763,6 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
        u32 reg[16];
        int num_accesses = 0;
        int thisrun_accesses;
-       u32 *buf32;
-       u16 *buf16;
-       u8 *buf8;
        int i;
        u32 cpsr;
        int retval;
@@ -1785,7 +1790,6 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
        switch (size)
        {
                case 4:
-                       buf32 = (u32*)buffer;
                        while (num_accesses < count)
                        {
                                u32 reg_list;
@@ -1796,7 +1800,8 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
                                {
                                        if (i > last_reg)
                                                last_reg = i;
-                                       reg[i] = *buf32++;
+                                       reg[i] = target_buffer_get_u32(target, buffer);
+                                       buffer += 4;
                                }
                                
                                arm7_9->write_core_regs(target, reg_list, reg);
@@ -1815,7 +1820,6 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
                        }       
                        break;
                case 2:
-                       buf16 = (u16*)buffer;
                        while (num_accesses < count)
                        {
                                u32 reg_list;
@@ -1826,7 +1830,8 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
                                {
                                        if (i > last_reg)
                                                last_reg = i;
-                                       reg[i] = *buf16++ & 0xffff;
+                                       reg[i] = target_buffer_get_u16(target, buffer) & 0xffff;
+                                       buffer += 2;
                                }
                                
                                arm7_9->write_core_regs(target, reg_list, reg);
@@ -1848,7 +1853,6 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
                        }       
                        break;
                case 1:
-                       buf8 = buffer;
                        while (num_accesses < count)
                        {
                                u32 reg_list;
@@ -1859,7 +1863,7 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
                                {
                                        if (i > last_reg)
                                                last_reg = i;
-                                       reg[i] = *buf8++ & 0xff;
+                                       reg[i] = *buffer++ & 0xff;
                                }
                                
                                arm7_9->write_core_regs(target, reg_list, reg);
@@ -1955,7 +1959,7 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe
        
        for (i = 0; i < count; i++)
        {
-               embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], buf_get_u32(buffer, 0, 32));
+               embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], target_buffer_get_u32(target, buffer));
                buffer += 4;
        }