use COMMAND_PARSE_ENABLE macro where appropriate
[openocd.git] / src / target / arm7_9_common.c
index 19c9791d9485c0b0dbafc77574ad687c3135c3af..16c8a925e7bc1d56635097ec8fe6071ad9522d18 100644 (file)
@@ -1242,9 +1242,6 @@ int arm7_9_soft_reset_halt(struct target *target)
        armv4_5->core_mode = ARMV4_5_MODE_SVC;
        armv4_5->core_state = ARMV4_5_STATE_ARM;
 
-       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
-               return ERROR_FAIL;
-
        /* reset registers */
        for (i = 0; i <= 14; i++)
        {
@@ -1413,14 +1410,15 @@ static int arm7_9_debug_entry(struct target *target)
 
        armv4_5->core_mode = cpsr & 0x1f;
 
-       if (armv4_5_mode_to_number(armv4_5->core_mode) == -1)
+       if (!is_arm_mode(armv4_5->core_mode))
        {
                target->state = TARGET_UNKNOWN;
                LOG_ERROR("cpsr contains invalid mode value - communication failure");
                return ERROR_TARGET_FAILURE;
        }
 
-       LOG_DEBUG("target entered debug state in %s mode", armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)]);
+       LOG_DEBUG("target entered debug state in %s mode",
+                        arm_mode_name(armv4_5->core_mode));
 
        if (armv4_5->core_state == ARMV4_5_STATE_THUMB)
        {
@@ -1438,9 +1436,6 @@ static int arm7_9_debug_entry(struct target *target)
        else
                context[15] -= arm7_9->dbgreq_adjust_pc * ((armv4_5->core_state == ARMV4_5_STATE_ARM) ? 4 : 2);
 
-       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
-               return ERROR_FAIL;
-
        for (i = 0; i <= 15; i++)
        {
                LOG_DEBUG("r%i: 0x%8.8" PRIx32 "", i, context[i]);
@@ -1451,9 +1446,6 @@ static int arm7_9_debug_entry(struct target *target)
 
        LOG_DEBUG("entered debug state at PC 0x%" PRIx32 "", context[15]);
 
-       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
-               return ERROR_FAIL;
-
        /* exceptions other than USR & SYS have a saved program status register */
        if ((armv4_5->core_mode != ARMV4_5_MODE_USR) && (armv4_5->core_mode != ARMV4_5_MODE_SYS))
        {
@@ -1505,7 +1497,7 @@ int arm7_9_full_context(struct target *target)
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+       if (!is_arm_mode(armv4_5->core_mode))
                return ERROR_FAIL;
 
        /* iterate through processor modes (User, FIQ, IRQ, SVC, ABT, UND)
@@ -1605,7 +1597,7 @@ int arm7_9_restore_context(struct target *target)
        if (arm7_9->pre_restore_context)
                arm7_9->pre_restore_context(target);
 
-       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+       if (!is_arm_mode(armv4_5->core_mode))
                return ERROR_FAIL;
 
        /* iterate through processor modes (User, FIQ, IRQ, SVC, ABT, UND)
@@ -1613,7 +1605,8 @@ int arm7_9_restore_context(struct target *target)
         */
        for (i = 0; i < 6; i++)
        {
-               LOG_DEBUG("examining %s mode", armv4_5_mode_strings[i]);
+               LOG_DEBUG("examining %s mode",
+                               arm_mode_name(armv4_5->core_mode));
                dirty = 0;
                mode_change = 0;
                /* check if there are dirty registers in the current mode
@@ -1675,7 +1668,10 @@ int arm7_9_restore_context(struct target *target)
                                        num_regs++;
                                        reg->dirty = 0;
                                        reg->valid = 1;
-                                       LOG_DEBUG("writing register %i of mode %s with value 0x%8.8" PRIx32 "", j, armv4_5_mode_strings[i], regs[j]);
+                                       LOG_DEBUG("writing register %i mode %s "
+                                               "with value 0x%8.8" PRIx32, j,
+                                               arm_mode_name(armv4_5->core_mode),
+                                               regs[j]);
                                }
                        }
 
@@ -2099,7 +2095,7 @@ int arm7_9_read_core_reg(struct target *target, int num, enum armv4_5_mode mode)
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
 
-       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+       if (!is_arm_mode(armv4_5->core_mode))
                return ERROR_FAIL;
 
        enum armv4_5_mode reg_mode = ((struct armv4_5_core_reg*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).arch_info)->mode;
@@ -2163,7 +2159,7 @@ int arm7_9_write_core_reg(struct target *target, int num, enum armv4_5_mode mode
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
 
-       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+       if (!is_arm_mode(armv4_5->core_mode))
                return ERROR_FAIL;
 
        enum armv4_5_mode reg_mode = ((struct armv4_5_core_reg*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).arch_info)->mode;
@@ -2368,7 +2364,7 @@ int arm7_9_read_memory(struct target *target, uint32_t address, uint32_t size, u
                        break;
        }
 
-       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+       if (!is_arm_mode(armv4_5->core_mode))
                return ERROR_FAIL;
 
        for (i = 0; i <= last_reg; i++)
@@ -2551,7 +2547,7 @@ int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size,
        buf_set_u32(dbg_ctrl->value, EICE_DBG_CONTROL_DBGACK, 1, 1);
        embeddedice_store_reg(dbg_ctrl);
 
-       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+       if (!is_arm_mode(armv4_5->core_mode))
                return ERROR_FAIL;
 
        for (i = 0; i <= last_reg; i++)
@@ -2750,29 +2746,29 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_command)
        uint32_t value;
        int spsr;
        int retval;
-       struct target *target = get_current_target(cmd_ctx);
+       struct target *target = get_current_target(CMD_CTX);
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        if (!is_arm7_9(arm7_9))
        {
-               command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
+               command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
                return ERROR_TARGET_INVALID;
        }
 
        if (target->state != TARGET_HALTED)
        {
-               command_print(cmd_ctx, "can't write registers while running");
+               command_print(CMD_CTX, "can't write registers while running");
                return ERROR_FAIL;
        }
 
        if (CMD_ARGC < 2)
        {
-               command_print(cmd_ctx, "usage: write_xpsr <value> <not cpsr | spsr>");
+               command_print(CMD_CTX, "usage: write_xpsr <value> <not cpsr | spsr>");
                return ERROR_FAIL;
        }
 
-       COMMAND_PARSE_NUMBER(u32, args[0], value);
-       COMMAND_PARSE_NUMBER(int, args[1], spsr);
+       COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], value);
+       COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], spsr);
 
        /* if we're writing the CPSR, mask the T bit */
        if (!spsr)
@@ -2794,30 +2790,30 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_im8_command)
        int rotate;
        int spsr;
        int retval;
-       struct target *target = get_current_target(cmd_ctx);
+       struct target *target = get_current_target(CMD_CTX);
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        if (!is_arm7_9(arm7_9))
        {
-               command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
+               command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
                return ERROR_TARGET_INVALID;
        }
 
        if (target->state != TARGET_HALTED)
        {
-               command_print(cmd_ctx, "can't write registers while running");
+               command_print(CMD_CTX, "can't write registers while running");
                return ERROR_FAIL;
        }
 
        if (CMD_ARGC < 3)
        {
-               command_print(cmd_ctx, "usage: write_xpsr_im8 <im8> <rotate> <not cpsr | spsr>");
+               command_print(CMD_CTX, "usage: write_xpsr_im8 <im8> <rotate> <not cpsr | spsr>");
                return ERROR_FAIL;
        }
 
-       COMMAND_PARSE_NUMBER(u32, args[0], value);
-       COMMAND_PARSE_NUMBER(int, args[1], rotate);
-       COMMAND_PARSE_NUMBER(int, args[2], spsr);
+       COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], value);
+       COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], rotate);
+       COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], spsr);
 
        arm7_9->write_xpsr_im8(target, value, rotate, spsr);
        if ((retval = jtag_execute_queue()) != ERROR_OK)
@@ -2834,126 +2830,87 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command)
        uint32_t value;
        uint32_t mode;
        int num;
-       struct target *target = get_current_target(cmd_ctx);
+       struct target *target = get_current_target(CMD_CTX);
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        if (!is_arm7_9(arm7_9))
        {
-               command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
+               command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
                return ERROR_TARGET_INVALID;
        }
 
        if (target->state != TARGET_HALTED)
        {
-               command_print(cmd_ctx, "can't write registers while running");
+               command_print(CMD_CTX, "can't write registers while running");
                return ERROR_FAIL;
        }
 
        if (CMD_ARGC < 3)
        {
-               command_print(cmd_ctx, "usage: write_core_reg <num> <mode> <value>");
+               command_print(CMD_CTX, "usage: write_core_reg <num> <mode> <value>");
                return ERROR_FAIL;
        }
 
-       COMMAND_PARSE_NUMBER(int, args[0], num);
-       COMMAND_PARSE_NUMBER(u32, args[1], mode);
-       COMMAND_PARSE_NUMBER(u32, args[2], value);
+       COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], num);
+       COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], mode);
+       COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], value);
 
        return arm7_9_write_core_reg(target, num, mode, value);
 }
 
 COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
 {
-       struct target *target = get_current_target(cmd_ctx);
+       struct target *target = get_current_target(CMD_CTX);
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        if (!is_arm7_9(arm7_9))
        {
-               command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
+               command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
                return ERROR_TARGET_INVALID;
        }
 
        if (CMD_ARGC > 0)
-       {
-               if (strcmp("enable", args[0]) == 0)
-               {
-                       arm7_9->use_dbgrq = 1;
-               }
-               else if (strcmp("disable", args[0]) == 0)
-               {
-                       arm7_9->use_dbgrq = 0;
-               }
-               else
-               {
-                       command_print(cmd_ctx, "usage: arm7_9 dbgrq <enable | disable>");
-               }
-       }
+               COMMAND_PARSE_ENABLE(CMD_ARGV[0],arm7_9->use_dbgrq);
 
-       command_print(cmd_ctx, "use of EmbeddedICE dbgrq instead of breakpoint for target halt %s", (arm7_9->use_dbgrq) ? "enabled" : "disabled");
+       command_print(CMD_CTX, "use of EmbeddedICE dbgrq instead of breakpoint for target halt %s", (arm7_9->use_dbgrq) ? "enabled" : "disabled");
 
        return ERROR_OK;
 }
 
 COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
 {
-       struct target *target = get_current_target(cmd_ctx);
+       struct target *target = get_current_target(CMD_CTX);
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        if (!is_arm7_9(arm7_9))
        {
-               command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
+               command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
                return ERROR_TARGET_INVALID;
        }
 
        if (CMD_ARGC > 0)
-       {
-               if (strcmp("enable", args[0]) == 0)
-               {
-                       arm7_9->fast_memory_access = 1;
-               }
-               else if (strcmp("disable", args[0]) == 0)
-               {
-                       arm7_9->fast_memory_access = 0;
-               }
-               else
-               {
-                       command_print(cmd_ctx, "usage: arm7_9 fast_memory_access <enable | disable>");
-               }
-       }
+               COMMAND_PARSE_ENABLE(CMD_ARGV[0], arm7_9->fast_memory_access);
 
-       command_print(cmd_ctx, "fast memory access is %s", (arm7_9->fast_memory_access) ? "enabled" : "disabled");
+       command_print(CMD_CTX, "fast memory access is %s", (arm7_9->fast_memory_access) ? "enabled" : "disabled");
 
        return ERROR_OK;
 }
 
 COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
 {
-       struct target *target = get_current_target(cmd_ctx);
+       struct target *target = get_current_target(CMD_CTX);
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        if (!is_arm7_9(arm7_9))
        {
-               command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
+               command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
                return ERROR_TARGET_INVALID;
        }
 
        if (CMD_ARGC > 0)
-       {
-               if (strcmp("enable", args[0]) == 0)
-               {
-                       arm7_9->dcc_downloads = 1;
-               }
-               else if (strcmp("disable", args[0]) == 0)
-               {
-                       arm7_9->dcc_downloads = 0;
-               }
-               else
-               {
-                       command_print(cmd_ctx, "usage: arm7_9 dcc_downloads <enable | disable>");
-               }
-       }
+               COMMAND_PARSE_ENABLE(CMD_ARGV[0], arm7_9->dcc_downloads);
 
-       command_print(cmd_ctx, "dcc downloads are %s", (arm7_9->dcc_downloads) ? "enabled" : "disabled");
+       command_print(CMD_CTX, "dcc downloads are %s", (arm7_9->dcc_downloads) ? "enabled" : "disabled");
 
        return ERROR_OK;
 }

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