#include "arm720t.h"
#include "jtag.h"
#include "log.h"
+#include "time_support.h"
#include <stdlib.h>
#include <string.h>
int arm720t_handle_mw_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
/* forward declarations */
-int arm720t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
+int arm720t_target_create(struct target_s *target,Jim_Interp *interp);
int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int arm720t_quit();
+int arm720t_quit(void);
int arm720t_arch_state(struct target_s *target);
int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
.remove_watchpoint = arm7_9_remove_watchpoint,
.register_commands = arm720t_register_commands,
- .target_command = arm720t_target_command,
+ .target_create = arm720t_target_create,
.init_target = arm720t_init_target,
.examine = arm7tdmi_examine,
.quit = arm720t_quit
"cpsr: 0x%8.8x pc: 0x%8.8x\n"
"MMU: %s, Cache: %s",
armv4_5_state_strings[armv4_5->core_state],
- target_debug_reason_strings[target->debug_reason],
+ Jim_Nvp_value2name_simple( nvp_target_debug_reason, target->debug_reason )->name ,
armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32),
buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info;
arm720t_common_t *arm720t = arm7tdmi->arch_info;
- int i;
reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
target_halt(target);
- for (i=0; i<10; i++)
+ long long then=timeval_ms();
+ int timeout;
+ while (!(timeout=((timeval_ms()-then)>1000)))
{
if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0)
{
{
break;
}
- /* do not eat all CPU, time out after 1 se*/
- usleep(100*1000);
+ if (debug_level>=3)
+ {
+ alive_sleep(100);
+ } else
+ {
+ keep_alive();
+ }
}
- if (i==10)
+ if (timeout)
{
LOG_ERROR("Failed to halt CPU after 1 sec");
return ERROR_TARGET_TIMEOUT;
}
-int arm720t_quit()
+int arm720t_quit(void)
{
return ERROR_OK;
}
-int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, int chain_pos, char *variant)
+int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, int chain_pos, const char *variant)
{
arm7tdmi_common_t *arm7tdmi = &arm720t->arm7tdmi_common;
arm7_9_common_t *arm7_9 = &arm7tdmi->arm7_9_common;
return ERROR_OK;
}
-int arm720t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target)
+int arm720t_target_create(struct target_s *target, Jim_Interp *interp)
{
- int chain_pos;
- char *variant = NULL;
- arm720t_common_t *arm720t = malloc(sizeof(arm720t_common_t));
- memset(arm720t, 0, sizeof(*arm720t));
-
- if (argc < 4)
- {
- LOG_ERROR("'target arm720t' requires at least one additional argument");
- exit(-1);
- }
-
- chain_pos = strtoul(args[3], NULL, 0);
+ arm720t_common_t *arm720t = calloc(1,sizeof(arm720t_common_t));
- if (argc >= 5)
- variant = args[4];
-
- LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
-
- arm720t_init_arch_info(target, arm720t, chain_pos, variant);
+ arm720t_init_arch_info(target, arm720t, target->chain_position, target->variant);
return ERROR_OK;
}
return armv4_5_mmu_handle_mw_phys_command(cmd_ctx, cmd, args, argc, target, &arm720t->armv4_5_mmu);
}
-