Cortex-A8: implement DPM

[openocd.git] / src / target / arm11.h

diff --git a/src/target/arm11.h b/src/target/arm11.h
index ae6a93ca84a54fb2dba5eb4943c9d7eb203c1fe6..c3f4e8643bfa6fc6aab38551f869734cd6b484d0 100644 (file)
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -23,52 +23,22 @@
 #ifndef ARM11_H
 #define ARM11_H
 
-#include "target.h"
-#include "register.h"
-#include "jtag.h"
+#include "armv4_5.h"
+#include "arm_dpm.h"
 
-#define asizeof(x)     (sizeof(x) / sizeof((x)[0]))
-
-#define NEW(type, variable, items)                     \
-       type * variable = calloc(1, sizeof(type) * items)
-
-/* For MinGW use 'I' prefix to print size_t (instead of 'z') */
-/* Except if __USE_MINGW_ANSI_STDIO is defined with MinGW    */
-
-#if (!defined(__MSVCRT__) || defined(__USE_MINGW_ANSI_STDIO))
-#define ZU             "%zu"
-#else
-#define ZU             "%Iu"
-#endif
-
-#define ARM11_REGCACHE_MODEREGS                0
-#define ARM11_REGCACHE_FREGS           0
-
-#define ARM11_REGCACHE_COUNT           (20 +                                   \
-                                        23 * ARM11_REGCACHE_MODEREGS +                 \
-                                         9 * ARM11_REGCACHE_FREGS)
+#define ARM11_REGCACHE_COUNT           3
 
 #define ARM11_TAP_DEFAULT                      TAP_INVALID
 
-
-#define CHECK_RETVAL(action)                                                           \
-do {                                                                                                           \
-       int __retval = (action);                                                                \
-                                                                                                                       \
-       if (__retval != ERROR_OK)                                                               \
-       {                                                                                                               \
-               LOG_DEBUG("error while calling \"" # action "\"");      \
-               return __retval;                                                                        \
-       }                                                                                                               \
-                                                                                                                       \
-} while (0)
-
-
-struct arm11_register_history
-{
-       uint32_t                value;
-       uint8_t         valid;
-};
+#define CHECK_RETVAL(action)                   \
+       do {                                    \
+               int __retval = (action);        \
+               if (__retval != ERROR_OK) {     \
+                       LOG_DEBUG("error while calling \"%s\"", \
+                               # action );     \
+                       return __retval;        \
+               }                               \
+       } while (0)
 
 enum arm11_debug_version
 {
@@ -80,20 +50,18 @@ enum arm11_debug_version
 
 struct arm11_common
 {
+       struct arm      arm;
        struct target * target;         /**< Reference back to the owner */
 
+       /** Debug module state. */
+       struct arm_dpm dpm;
+
        /** \name Processor type detection */
        /*@{*/
 
-       uint32_t                device_id;              /**< IDCODE readout                             */
-       uint32_t                didr;                   /**< DIDR readout (debug capabilities)  */
-       uint8_t         implementor;    /**< DIDR Implementor readout           */
-
        size_t  brp;                    /**< Number of Breakpoint Register Pairs from DIDR      */
        size_t  wrp;                    /**< Number of Watchpoint Register Pairs from DIDR      */
 
-       enum arm11_debug_version
-               debug_version;          /**< ARM debug architecture from DIDR   */
        /*@}*/
 
        uint32_t                last_dscr;              /**< Last retrieved DSCR value;
@@ -101,7 +69,7 @@ struct arm11_common
 
        bool    simulate_reset_on_next_halt;    /**< Perform cleanups of the ARM state on next halt */
 
-       /** \name Shadow registers to save processor state */
+       /** \name Shadow registers to save debug state */
        /*@{*/
 
        struct reg *    reg_list;                                                       /**< target register list */
@@ -109,16 +77,20 @@ struct arm11_common
 
        /*@}*/
 
-       struct arm11_register_history
-               reg_history[ARM11_REGCACHE_COUNT];      /**< register state before last resume */
-
        size_t  free_brps;                              /**< keep track of breakpoints allocated by arm11_add_breakpoint() */
        size_t  free_wrps;                              /**< keep track of breakpoints allocated by arm11_add_watchpoint() */
 
        // GA
        struct reg_cache *core_cache;
+
+       struct arm_jtag jtag_info;
 };
 
+static inline struct arm11_common *target_to_arm11(struct target *target)
+{
+       return container_of(target->arch_info, struct arm11_common,
+                       arm);
+}
 
 /**
  * ARM11 DBGTAP instructions
@@ -182,11 +154,4 @@ struct arm11_reg_state
        struct target *                 target;
 };
 
-int arm11_register_commands(struct command_context_s *cmd_ctx);
-
-int arm11_read_etm(struct arm11_common * arm11, uint8_t address, uint32_t *value);
-int arm11_write_etm(struct arm11_common * arm11, uint8_t address, uint32_t value);
-
-
-
 #endif /* ARM11_H */