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Fix most pointer cast alignment warnings in arm11.c; fix u16 memory reads..
[openocd.git] / src / target / arm11.c
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 4f7d37c667aaabdd9b744f7a46e4320c8be6dcef..77a57c9d855bef2ee0d426cdf39df1432c6e34d1 100644 (file)
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -316,15 +316,14 @@ reg_t arm11_gdb_dummy_fps_reg =
 int arm11_check_init(arm11_common_t * arm11, u32 * dscr)
 {
        FNC_INFO;
-       int retval;
 
        u32                     dscr_local_tmp_copy;
 
        if (!dscr)
        {
                dscr = &dscr_local_tmp_copy;
-               if ((retval=arm11_read_DSCR(arm11, dscr))!=ERROR_OK)
-                       return retval;
+
+               CHECK_RETVAL(arm11_read_DSCR(arm11, dscr));
        }
 
        if (!(*dscr & ARM11_DSCR_MODE_SELECT))
@@ -382,9 +381,7 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11)
        }}
 
        /* Save DSCR */
-       int retval;
-       if ((retval=arm11_read_DSCR(arm11, &R(DSCR)))!=ERROR_OK)
-               return retval;
+       CHECK_RETVAL(arm11_read_DSCR(arm11, &R(DSCR)));
 
        /* Save wDTR */
 
@@ -586,11 +583,8 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
           otherwise our programming would be sloppy */
        {
                u32 DSCR;
-               int retval;
-               if ((retval=arm11_read_DSCR(arm11, &DSCR))!=ERROR_OK)
-               {
-                       return retval;
-               }
+
+               CHECK_RETVAL(arm11_read_DSCR(arm11, &DSCR));
 
                if (DSCR & (ARM11_DSCR_RDTR_FULL | ARM11_DSCR_WDTR_FULL))
                {
@@ -679,14 +673,12 @@ int arm11_poll(struct target_s *target)
                return ERROR_OK;
 
        u32     dscr;
-       int retval;
-       if ((retval=arm11_read_DSCR(arm11, &dscr))!=ERROR_OK)
-               return retval;
+
+       CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
 
        LOG_DEBUG("DSCR %08x", dscr);
 
-       if ((retval=arm11_check_init(arm11, &dscr))!=ERROR_OK)
-               return retval;
+       CHECK_RETVAL(arm11_check_init(arm11, &dscr));
 
        if (dscr & ARM11_DSCR_CORE_HALTED)
        {
@@ -739,8 +731,6 @@ int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer)
 /* target execution control */
 int arm11_halt(struct target_s *target)
 {
-       int retval = ERROR_OK;
-
        FNC_INFO;
 
        arm11_common_t * arm11 = target->arch_info;
@@ -767,19 +757,13 @@ int arm11_halt(struct target_s *target)
 
        arm11_add_IR(arm11, ARM11_HALT, TAP_IDLE);
 
-       if((retval = jtag_execute_queue()) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(jtag_execute_queue());
 
        u32 dscr;
 
        while (1)
        {
-               int retval;
-               retval = arm11_read_DSCR(arm11, &dscr);
-               if (retval!=ERROR_OK)
-                       return retval;
+               CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
 
                if (dscr & ARM11_DSCR_CORE_HALTED)
                        break;
@@ -792,19 +776,15 @@ int arm11_halt(struct target_s *target)
        target->state           = TARGET_HALTED;
        target->debug_reason    = arm11_get_DSCR_debug_reason(dscr);
 
-       if((retval = target_call_event_callbacks(target,
-               old_state == TARGET_DEBUG_RUNNING ? TARGET_EVENT_DEBUG_HALTED : TARGET_EVENT_HALTED)) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(
+               target_call_event_callbacks(target,
+                       old_state == TARGET_DEBUG_RUNNING ? TARGET_EVENT_DEBUG_HALTED : TARGET_EVENT_HALTED));
 
        return ERROR_OK;
 }
 
 int arm11_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)
 {
-       int retval = ERROR_OK;
-
        FNC_INFO;
 
        //        LOG_DEBUG("current %d  address %08x  handle_breakpoints %d  debug_execution %d",
@@ -876,17 +856,13 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
 
        arm11_add_IR(arm11, ARM11_RESTART, TAP_IDLE);
 
-       if((retval = jtag_execute_queue()) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(jtag_execute_queue());
 
        while (1)
        {
                u32 dscr;
-               retval = arm11_read_DSCR(arm11, &dscr);
-               if (retval!=ERROR_OK)
-                       return retval;
+
+               CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
 
                LOG_DEBUG("DSCR %08x", dscr);
 
@@ -899,19 +875,14 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
                target->state                   = TARGET_RUNNING;
                target->debug_reason    = DBG_REASON_NOTHALTED;
 
-               if((retval = target_call_event_callbacks(target, TARGET_EVENT_RESUMED)) != ERROR_OK)
-               {
-                       return retval;
-               }
+               CHECK_RETVAL(target_call_event_callbacks(target, TARGET_EVENT_RESUMED));
        }
        else
        {
                target->state                   = TARGET_DEBUG_RUNNING;
                target->debug_reason    = DBG_REASON_NOTHALTED;
-               if((retval = target_call_event_callbacks(target, TARGET_EVENT_RESUMED)) != ERROR_OK)
-               {
-                       return retval;
-               }
+
+               CHECK_RETVAL(target_call_event_callbacks(target, TARGET_EVENT_RESUMED));
        }
 
        return ERROR_OK;
@@ -919,8 +890,6 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
 
 int arm11_step(struct target_s *target, int current, u32 address, int handle_breakpoints)
 {
-       int retval = ERROR_OK;
-
        FNC_INFO;
 
        LOG_DEBUG("target->state: %s",
@@ -937,14 +906,13 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
        if (!current)
                R(PC) = address;
 
-       LOG_INFO("STEP PC %08x%s", R(PC), !current ? "!" : "");
+       LOG_DEBUG("STEP PC %08x%s", R(PC), !current ? "!" : "");
 
        /** \todo TODO: Thumb not supported here */
 
        u32     next_instruction;
 
-       if ((arm11_read_memory_word(arm11, R(PC), &next_instruction))!=ERROR_OK)
-               return retval;
+       CHECK_RETVAL(arm11_read_memory_word(arm11, R(PC), &next_instruction));
 
        /* skip over BKPT */
        if ((next_instruction & 0xFFF00070) == 0xe1200070)
@@ -952,7 +920,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
                R(PC) += 4;
                arm11->reg_list[ARM11_RC_PC].valid = 1;
                arm11->reg_list[ARM11_RC_PC].dirty = 0;
-               LOG_INFO("Skipping BKPT");
+               LOG_DEBUG("Skipping BKPT");
        }
        /* skip over Wait for interrupt / Standby */
        /* mcr  15, 0, r?, cr7, cr0, {4} */
@@ -961,12 +929,12 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
                R(PC) += 4;
                arm11->reg_list[ARM11_RC_PC].valid = 1;
                arm11->reg_list[ARM11_RC_PC].dirty = 0;
-               LOG_INFO("Skipping WFI");
+               LOG_DEBUG("Skipping WFI");
        }
        /* ignore B to self */
        else if ((next_instruction & 0xFEFFFFFF) == 0xeafffffe)
        {
-               LOG_INFO("Not stepping jump to self");
+               LOG_DEBUG("Not stepping jump to self");
        }
        else
        {
@@ -988,8 +956,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
                brp[1].address  = ARM11_SC7_BCR0;
                brp[1].value    = 0x1 | (3 << 1) | (0x0F << 5) | (0 << 14) | (0 << 16) | (0 << 20) | (2 << 21);
 
-               if ((retval=arm11_sc7_run(arm11, brp, asizeof(brp)))!=ERROR_OK)
-                       return retval;
+               CHECK_RETVAL(arm11_sc7_run(arm11, brp, asizeof(brp)));
 
                /* resume */
 
@@ -1000,15 +967,11 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
                        R(DSCR) |= ARM11_DSCR_INTERRUPTS_DISABLE;
 
 
-               if ((retval=arm11_leave_debug_state(arm11))!=ERROR_OK)
-                       return retval;
+               CHECK_RETVAL(arm11_leave_debug_state(arm11));
 
                arm11_add_IR(arm11, ARM11_RESTART, TAP_IDLE);
 
-               if((retval = jtag_execute_queue()) != ERROR_OK)
-               {
-                       return retval;
-               }
+               CHECK_RETVAL(jtag_execute_queue());
 
                /** \todo TODO: add a timeout */
 
@@ -1017,9 +980,8 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
                while (1)
                {
                        u32 dscr;
-                       retval = arm11_read_DSCR(arm11, &dscr);
-                       if (retval!=ERROR_OK)
-                               return retval;
+
+                       CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
 
                        LOG_DEBUG("DSCR %08x", dscr);
 
@@ -1032,8 +994,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
                arm11_sc7_clear_vbw(arm11);
 
                /* save state */
-               if((retval = arm11_on_enter_debug_state(arm11))!=ERROR_OK)
-                       return retval;
+               CHECK_RETVAL(arm11_on_enter_debug_state(arm11));
 
            /* restore default state */
                R(DSCR) &= ~ARM11_DSCR_INTERRUPTS_DISABLE;
@@ -1043,10 +1004,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
        //        target->state         = TARGET_HALTED;
        target->debug_reason    = DBG_REASON_SINGLESTEP;
 
-       if((retval = target_call_event_callbacks(target, TARGET_EVENT_HALTED)) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(target_call_event_callbacks(target, TARGET_EVENT_HALTED));
 
        return ERROR_OK;
 }
@@ -1069,9 +1027,7 @@ int arm11_assert_reset(struct target_s *target)
 
        if (target->reset_halt)
        {
-               int retval;
-               if ((retval = target_halt(target))!=ERROR_OK)
-                       return retval;
+               CHECK_RETVAL(target_halt(target));
        }
 
        return ERROR_OK;
@@ -1188,10 +1144,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
                {
                        arm11->reg_list[ARM11_RC_R1].dirty = 1;
 
-                       u16 * buf16 = (u16*)buffer;
-
-                       {size_t i;
-                       for (i = 0; i < count; i++)
+                       for (size_t i = 0; i < count; i++)
                        {
                                /* ldrh    r1, [r0], #2 */
                                arm11_run_instr_no_data1(arm11,
@@ -1202,20 +1155,24 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
                                /* MCR p14,0,R1,c0,c5,0 */
                                arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
 
-                               *buf16++ = res;
-                       }}
+                               u16 svalue = res;
+                               memcpy(buffer + count * sizeof(u16), &svalue, sizeof(u16));
+                       }
 
                        break;
                }
 
        case 4:
+               {
+               u32 instr = !arm11_config_memrw_no_increment ? 0xecb05e01 : 0xed905e00;
+               /** \todo TODO: buffer cast to u32* causes alignment warnings */
+               u32 *words = (u32 *)buffer;
 
                /* LDC p14,c5,[R0],#4 */
                /* LDC p14,c5,[R0] */
-               arm11_run_instr_data_from_core(arm11,
-                       (!arm11_config_memrw_no_increment ? 0xecb05e01 : 0xed905e00),
-                       (u32 *)buffer, count);
+               arm11_run_instr_data_from_core(arm11, instr, words, count);
                break;
+               }
        }
 
        arm11_run_instr_data_finish(arm11);
@@ -1267,45 +1224,45 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
                {
                        arm11->reg_list[ARM11_RC_R1].dirty = 1;
 
-                       u16 * buf16 = (u16*)buffer;
-
-                       {size_t i;
-                       for (i = 0; i < count; i++)
+                       for (size_t i = 0; i < count; i++)
                        {
+                               u16 value;
+                               memcpy(&value, buffer + count * sizeof(u16), sizeof(u16));
+
                                /* MRC p14,0,r1,c0,c5,0 */
-                               arm11_run_instr_data_to_core1(arm11, 0xee101e15, *buf16++);
+                               arm11_run_instr_data_to_core1(arm11, 0xee101e15, value);
 
                                /* strh    r1, [r0], #2 */
                                /* strh    r1, [r0] */
                                arm11_run_instr_no_data1(arm11,
                                        !arm11_config_memrw_no_increment ? 0xe0c010b2 : 0xe1c010b0);
-                       }}
+                       }
 
                        break;
                }
 
-       case 4:
-               /** \todo TODO: check if buffer cast to u32* might cause alignment problems */
+       case 4: {
+               u32 instr = !arm11_config_memrw_no_increment ? 0xeca05e01 : 0xed805e00;
+
+               /** \todo TODO: buffer cast to u32* causes alignment warnings */
+               u32 *words = (u32*)buffer;
 
                if (!arm11_config_memwrite_burst)
                {
                        /* STC p14,c5,[R0],#4 */
                        /* STC p14,c5,[R0]*/
-                       arm11_run_instr_data_to_core(arm11,
-                               (!arm11_config_memrw_no_increment ? 0xeca05e01 : 0xed805e00),
-                               (u32 *)buffer, count);
+                       arm11_run_instr_data_to_core(arm11, instr, words, count);
                }
                else
                {
                        /* STC p14,c5,[R0],#4 */
                        /* STC p14,c5,[R0]*/
-                       arm11_run_instr_data_to_core_noack(arm11,
-                               (!arm11_config_memrw_no_increment ? 0xeca05e01 : 0xed805e00),
-                               (u32 *)buffer, count);
+                       arm11_run_instr_data_to_core_noack(arm11, instr, words, count);
                }
 
                break;
        }
+       }
 
 #if 1
        /* r0 verification */
@@ -1349,11 +1306,13 @@ int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8
        return arm11_write_memory(target, address, 4, count, buffer);
 }
 
+/* here we have nothing target specific to contribute, so we fail and then the
+ * fallback code will read data from the target and calculate the CRC on the
+ * host.
+ */
 int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum)
 {
-       FNC_INFO_NOTIMPLEMENTED;
-
-       return ERROR_OK;
+       return ERROR_FAIL;
 }
 
 /* target break-/watchpoint control
@@ -1375,13 +1334,13 @@ int arm11_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 
        if (!arm11->free_brps)
        {
-               LOG_INFO("no breakpoint unit available for hardware breakpoint");
+               LOG_DEBUG("no breakpoint unit available for hardware breakpoint");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
        if (breakpoint->length != 4)
        {
-               LOG_INFO("only breakpoints of four bytes length supported");
+               LOG_DEBUG("only breakpoints of four bytes length supported");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
@@ -1511,25 +1470,18 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
        }
 
        // no debug, otherwise breakpoint is not set
-       if((retval = target_resume(target, 0, entry_point, 1, 0)) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(target_resume(target, 0, entry_point, 1, 0));
 
-       if((retval = target_wait_state(target, TARGET_HALTED, timeout_ms)) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(target_wait_state(target, TARGET_HALTED, timeout_ms));
 
        if (target->state != TARGET_HALTED)
        {
-               if ((retval=target_halt(target))!=ERROR_OK)
-                       return retval;
-               if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
-               {
-                       return retval;
-               }
+               CHECK_RETVAL(target_halt(target));
+
+               CHECK_RETVAL(target_wait_state(target, TARGET_HALTED, 500));
+
                retval = ERROR_TARGET_TIMEOUT;
+
                goto del_breakpoint;
        }
 
@@ -1590,7 +1542,6 @@ restore:
 
 int arm11_target_create(struct target_s *target, Jim_Interp *interp)
 {
-       int retval = ERROR_OK;
        FNC_INFO;
 
        NEW(arm11_common_t, arm11, 1);
@@ -1601,10 +1552,7 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp)
        arm11->jtag_info.tap    = target->tap;
        arm11->jtag_info.scann_size     = 5;
 
-       if((retval = arm_jtag_setup_connection(&arm11->jtag_info)) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(arm_jtag_setup_connection(&arm11->jtag_info));
 
        if (target->tap==NULL)
                return ERROR_FAIL;
@@ -1630,7 +1578,6 @@ int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target
 int arm11_examine(struct target_s *target)
 {
        FNC_INFO;
-       int retval;
 
        arm11_common_t * arm11 = target->arch_info;
 
@@ -1657,9 +1604,7 @@ int arm11_examine(struct target_s *target)
 
        arm11_add_dr_scan_vc(asizeof(chain0_fields), chain0_fields, TAP_IDLE);
 
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
-               return retval;
-
+       CHECK_RETVAL(jtag_execute_queue());
 
        switch (arm11->device_id & 0x0FFFF000)
        {
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