target/arc: Introduce L1I,L1D,L2 caches support

[openocd.git] / src / target / arc_mem.c

diff --git a/src/target/arc_mem.c b/src/target/arc_mem.c
index e80bfb4e41561b791a40d01b1971e2f77607ad5b..866c71fc25d547db9d1f888d10d9e05d9d696fd8 100644 (file)
--- a/src/target/arc_mem.c
+++ b/src/target/arc_mem.c
@@ -41,10 +41,18 @@ static int arc_mem_write_block32(struct target *target, uint32_t addr,
        /* Check arguments */
        assert(!(addr & 3));
 
+       /* We need to flush the cache since it might contain dirty
+        * lines, so the cache invalidation may cause data inconsistency. */
+       CHECK_RETVAL(arc_cache_flush(target));
+
+
        /* No need to flush cache, because we don't read values from memory. */
        CHECK_RETVAL(arc_jtag_write_memory(&arc->jtag_info, addr, count,
                                (uint32_t *)buf));
 
+       /* Invalidate caches. */
+       CHECK_RETVAL(arc_cache_invalidate(target));
+
        return ERROR_OK;
 }
 
@@ -64,6 +72,9 @@ static int arc_mem_write_block16(struct target *target, uint32_t addr,
        /* Check arguments */
        assert(!(addr & 1));
 
+       /* We will read data from memory, so we need to flush the cache. */
+       CHECK_RETVAL(arc_cache_flush(target));
+
        /* non-word writes are less common, than 4-byte writes, so I suppose we can
         * allowe ourselves to write this in a cycle, instead of calling arc_jtag
         * with count > 1. */
@@ -97,6 +108,9 @@ static int arc_mem_write_block16(struct target *target, uint32_t addr,
                        (addr + i * sizeof(uint16_t)) & ~3u, 1, &buffer_he));
        }
 
+       /* Invalidate caches. */
+       CHECK_RETVAL(arc_cache_invalidate(target));
+
        return ERROR_OK;
 }
 
@@ -113,6 +127,9 @@ static int arc_mem_write_block8(struct target *target, uint32_t addr,
        LOG_DEBUG("Write 1-byte memory block: addr=0x%08" PRIx32 ", count=%" PRIu32,
                        addr, count);
 
+       /* We will read data from memory, so we need to flush the cache. */
+       CHECK_RETVAL(arc_cache_flush(target));
+
        /* non-word writes are less common, than 4-byte writes, so I suppose we can
         * allowe ourselves to write this in a cycle, instead of calling arc_jtag
         * with count > 1. */
@@ -128,6 +145,9 @@ static int arc_mem_write_block8(struct target *target, uint32_t addr,
                CHECK_RETVAL(arc_jtag_write_memory(&arc->jtag_info, (addr + i) & ~3, 1, &buffer_he));
        }
 
+       /* Invalidate caches. */
+       CHECK_RETVAL(arc_cache_invalidate(target));
+
        return ERROR_OK;
 }
 
@@ -205,6 +225,9 @@ static int arc_mem_read_block(struct target *target, target_addr_t addr,
        assert(!(addr & 3));
        assert(size == 4);
 
+       /* Flush cache before memory access */
+       CHECK_RETVAL(arc_cache_flush(target));
+
        CHECK_RETVAL(arc_jtag_read_memory(&arc->jtag_info, addr, count, buf,
                    arc_mem_is_slow_memory(arc, addr, size, count)));