if (DSCR_RUN_MODE(dscr) == 0x3) {
if (prev_target_state != TARGET_HALTED) {
/* We have a halting debug event */
- LOG_DEBUG("Target halted");
+ LOG_DEBUG("Target %s halted", target_name(target));
target->state = TARGET_HALTED;
if ((prev_target_state == TARGET_RUNNING)
|| (prev_target_state == TARGET_UNKNOWN)
return retval;
if ((dscr & DSCR_ITE) == 0)
- LOG_ERROR("DSCR InstrCompl must be set before leaving debug!");
+ LOG_ERROR("DSCR.ITE must be set before leaving debug!");
+ if ((dscr & DSCR_ERR) != 0)
+ LOG_ERROR("DSCR.ERR must be cleared before leaving debug!");
/* make sure to acknowledge the halt event before resuming */
retval = mem_ap_write_atomic_u32(armv8->debug_ap,
/* make sure to clear all sticky errors */
retval = mem_ap_write_atomic_u32(armv8->debug_ap,
armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
+
+ /* discard async exceptions */
+ if (retval == ERROR_OK)
+ retval = dpm->instr_cpsr_sync(dpm);
+
if (retval != ERROR_OK)
return retval;
/* Examine debug reason */
- armv8_dpm_report_dscr(&armv8->dpm, aarch64->cpudbg_dscr);
+ armv8_dpm_report_dscr(dpm, aarch64->cpudbg_dscr);
/* save address of instruction that triggered the watchpoint? */
if (target->debug_reason == DBG_REASON_WATCHPOINT) {
struct armv8_common *armv8 = &aarch64->armv8_common;
int retval;
- /* clear sticky errors */
- mem_ap_write_atomic_u32(armv8->debug_ap,
- armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
-
switch (armv8->arm.core_mode) {
case ARMV8_64_EL0T:
armv8_dpm_modeswitch(&armv8->dpm, ARMV8_64_EL1H);
{
struct armv8_common *armv8 = target_to_armv8(target);
- LOG_DEBUG(" ");
+ LOG_DEBUG("%s", target_name(target));
if (armv8->pre_restore_context)
armv8->pre_restore_context(target);
return armv8_dpm_write_dirty_registers(&armv8->dpm, bpwp);
-
}
/*
uint32_t dscr;
uint8_t *tmp_buff = NULL;
- LOG_DEBUG("Writing APB-AP memory address 0x%" PRIx64 " size %" PRIu32 " count%" PRIu32,
+ LOG_DEBUG("Writing APB-AP memory address 0x%" PRIx64 " size %" PRIu32 " count %" PRIu32,
address, size, count);
+
if (target->state != TARGET_HALTED) {
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
reg = armv8_reg_current(arm, 0);
reg->dirty = true;
- /* clear any abort */
- retval = mem_ap_write_atomic_u32(armv8->debug_ap,
- armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
- if (retval != ERROR_OK)
- return retval;
-
-
/* This algorithm comes from DDI0487A.g, chapter J9.1 */
/* The algorithm only copies 32 bit words, so the buffer
if (dscr & (DSCR_ERR | DSCR_SYS_ERROR_PEND)) {
/* Abort occurred - clear it and exit */
LOG_ERROR("abort occurred - dscr = 0x%08" PRIx32, dscr);
- mem_ap_write_atomic_u32(armv8->debug_ap,
- armv8->debug_base + CPUV8_DBG_DRCR, 1<<2);
armv8_dpm_handle_exception(dpm);
goto error_free_buff_w;
}
uint8_t *u8buf_ptr;
uint32_t value;
- LOG_DEBUG("Reading APB-AP memory address 0x%" TARGET_PRIxADDR " size %" PRIu32 " count%" PRIu32,
+ LOG_DEBUG("Reading APB-AP memory address 0x%" TARGET_PRIxADDR " size %" PRIu32 " count %" PRIu32,
address, size, count);
+
if (target->state != TARGET_HALTED) {
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
reg = armv8_reg_current(arm, 0);
reg->dirty = true;
- /* clear any abort */
- retval = mem_ap_write_atomic_u32(armv8->debug_ap,
- armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
- if (retval != ERROR_OK)
- goto error_free_buff_r;
-
/* Read DSCR */
retval = mem_ap_read_atomic_u32(armv8->debug_ap,
armv8->debug_base + CPUV8_DBG_DSCR, &dscr);
if (dscr & (DSCR_ERR | DSCR_SYS_ERROR_PEND)) {
/* Abort occurred - clear it and exit */
LOG_ERROR("abort occurred - dscr = 0x%08" PRIx32, dscr);
- mem_ap_write_atomic_u32(armv8->debug_ap,
- armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
armv8_dpm_handle_exception(dpm);
goto error_free_buff_r;
}
COMMAND_REGISTRATION_DONE
};
static const struct command_registration aarch64_command_handlers[] = {
- {
- .chain = arm_command_handlers,
- },
{
.chain = armv8_command_handlers,
},