aarch64: remove arm command chain from aarch64 target commands
[openocd.git] / src / target / aarch64.c
index 110f8dca0ff544916386d5b2624d6f783498ac85..487173886fbe85f19451edb9706135039703f823 100644 (file)
@@ -389,7 +389,7 @@ static int aarch64_poll(struct target *target)
        if (DSCR_RUN_MODE(dscr) == 0x3) {
                if (prev_target_state != TARGET_HALTED) {
                        /* We have a halting debug event */
-                       LOG_DEBUG("Target halted");
+                       LOG_DEBUG("Target %s halted", target_name(target));
                        target->state = TARGET_HALTED;
                        if ((prev_target_state == TARGET_RUNNING)
                                || (prev_target_state == TARGET_UNKNOWN)
@@ -538,7 +538,9 @@ static int aarch64_internal_restart(struct target *target, bool slave_pe)
                return retval;
 
        if ((dscr & DSCR_ITE) == 0)
-               LOG_ERROR("DSCR InstrCompl must be set before leaving debug!");
+               LOG_ERROR("DSCR.ITE must be set before leaving debug!");
+       if ((dscr & DSCR_ERR) != 0)
+               LOG_ERROR("DSCR.ERR must be cleared before leaving debug!");
 
        /* make sure to acknowledge the halt event before resuming */
        retval = mem_ap_write_atomic_u32(armv8->debug_ap,
@@ -709,10 +711,6 @@ static int aarch64_post_debug_entry(struct target *target)
        struct armv8_common *armv8 = &aarch64->armv8_common;
        int retval;
 
-       /* clear sticky errors */
-       mem_ap_write_atomic_u32(armv8->debug_ap,
-                                   armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
-
        switch (armv8->arm.core_mode) {
                case ARMV8_64_EL0T:
                        armv8_dpm_modeswitch(&armv8->dpm, ARMV8_64_EL1H);
@@ -841,13 +839,12 @@ static int aarch64_restore_context(struct target *target, bool bpwp)
 {
        struct armv8_common *armv8 = target_to_armv8(target);
 
-       LOG_DEBUG(" ");
+       LOG_DEBUG("%s", target_name(target));
 
        if (armv8->pre_restore_context)
                armv8->pre_restore_context(target);
 
        return armv8_dpm_write_dirty_registers(&armv8->dpm, bpwp);
-
 }
 
 /*
@@ -1369,8 +1366,9 @@ static int aarch64_write_apb_ap_memory(struct target *target,
        uint32_t dscr;
        uint8_t *tmp_buff = NULL;
 
-       LOG_DEBUG("Writing APB-AP memory address 0x%" PRIx64 " size %"  PRIu32 " count%"  PRIu32,
+       LOG_DEBUG("Writing APB-AP memory address 0x%" PRIx64 " size %"  PRIu32 " count %"  PRIu32,
                          address, size, count);
+
        if (target->state != TARGET_HALTED) {
                LOG_WARNING("target not halted");
                return ERROR_TARGET_NOT_HALTED;
@@ -1389,13 +1387,6 @@ static int aarch64_write_apb_ap_memory(struct target *target,
        reg = armv8_reg_current(arm, 0);
        reg->dirty = true;
 
-       /*  clear any abort  */
-       retval = mem_ap_write_atomic_u32(armv8->debug_ap,
-                       armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
-       if (retval != ERROR_OK)
-               return retval;
-
-
        /* This algorithm comes from DDI0487A.g, chapter J9.1 */
 
        /* The algorithm only copies 32 bit words, so the buffer
@@ -1486,8 +1477,6 @@ static int aarch64_write_apb_ap_memory(struct target *target,
        if (dscr & (DSCR_ERR | DSCR_SYS_ERROR_PEND)) {
                /* Abort occurred - clear it and exit */
                LOG_ERROR("abort occurred - dscr = 0x%08" PRIx32, dscr);
-               mem_ap_write_atomic_u32(armv8->debug_ap,
-                                       armv8->debug_base + CPUV8_DBG_DRCR, 1<<2);
                armv8_dpm_handle_exception(dpm);
                goto error_free_buff_w;
        }
@@ -1528,8 +1517,9 @@ static int aarch64_read_apb_ap_memory(struct target *target,
        uint8_t *u8buf_ptr;
        uint32_t value;
 
-       LOG_DEBUG("Reading APB-AP memory address 0x%" TARGET_PRIxADDR " size %" PRIu32 " count%"  PRIu32,
+       LOG_DEBUG("Reading APB-AP memory address 0x%" TARGET_PRIxADDR " size %" PRIu32 " count %"  PRIu32,
                          address, size, count);
+
        if (target->state != TARGET_HALTED) {
                LOG_WARNING("target not halted");
                return ERROR_TARGET_NOT_HALTED;
@@ -1547,12 +1537,6 @@ static int aarch64_read_apb_ap_memory(struct target *target,
        reg = armv8_reg_current(arm, 0);
        reg->dirty = true;
 
-       /*      clear any abort  */
-       retval = mem_ap_write_atomic_u32(armv8->debug_ap,
-                               armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
-       if (retval != ERROR_OK)
-               goto error_free_buff_r;
-
        /* Read DSCR */
        retval = mem_ap_read_atomic_u32(armv8->debug_ap,
                                armv8->debug_base + CPUV8_DBG_DSCR, &dscr);
@@ -1652,8 +1636,6 @@ static int aarch64_read_apb_ap_memory(struct target *target,
        if (dscr & (DSCR_ERR | DSCR_SYS_ERROR_PEND)) {
                /* Abort occurred - clear it and exit */
                LOG_ERROR("abort occurred - dscr = 0x%08" PRIx32, dscr);
-               mem_ap_write_atomic_u32(armv8->debug_ap,
-                                       armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
                armv8_dpm_handle_exception(dpm);
                goto error_free_buff_r;
        }
@@ -2143,9 +2125,6 @@ static const struct command_registration aarch64_exec_command_handlers[] = {
        COMMAND_REGISTRATION_DONE
 };
 static const struct command_registration aarch64_command_handlers[] = {
-       {
-               .chain = arm_command_handlers,
-       },
        {
                .chain = armv8_command_handlers,
        },

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