jtag: usb_blaster: fix allocation of usb_blaster_device_desc

[openocd.git] / src / jtag / swd.h

diff --git a/src/jtag/swd.h b/src/jtag/swd.h
index 1931c4a92a398d2e732276ab4b56c91773d1c018..9041ce088db8741a0befda73007c2ffeedc3e72b 100644 (file)
--- a/src/jtag/swd.h
+++ b/src/jtag/swd.h
@@ -1,12 +1,32 @@
-//
+/***************************************************************************
+ *   Copyright (C) 2009-2010 by David Brownell                             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+#ifndef SWD_H
+#define SWD_H
 
 /* Bits in SWD command packets, written from host to target
  * first bit on the wire is START
  */
 #define SWD_CMD_START  (1 << 0)        /* always set */
 #define SWD_CMD_APnDP  (1 << 1)        /* set only for AP access */
-#define SWD_CMD_RnW    (1 << 2)        /* set only for read access */
-#define SWD_CMD_A32    (3 << 3)        /* bits A[3:2] of register addr */
+#define SWD_CMD_RnW    (1 << 2)                /* set only for read access */
+#define SWD_CMD_A32    (3 << 3)                /* bits A[3:2] of register addr */
 #define SWD_CMD_PARITY (1 << 5)        /* parity of APnDP|RnW|A32 */
 #define SWD_CMD_STOP   (0 << 6)        /* always clear for synch SWD */
 #define SWD_CMD_PARK   (0 << 7)        /* not driven by host (pull high) */
@@ -33,7 +53,7 @@ static inline uint8_t swd_cmd(bool is_read, bool is_ap, uint8_t regnum)
                | (is_read ? SWD_CMD_RnW : 0)
                | ((regnum & 0xc) << 1);
 
-       //8 cmd bits 4:1 may be set
+       /* 8 cmd bits 4:1 may be set */
        if (nibble_parity(cmd >> 1))
                cmd |= SWD_CMD_PARITY;
 
@@ -75,7 +95,7 @@ struct swd_driver {
          * @param where to store value to read from register
          *
          * @return SWD_ACK_* code for the transaction
-         *     or (negative) fault code
+         *             or (negative) fault code
          */
         int (*read_reg)(uint8_t cmd, uint32_t *value);
 
@@ -86,7 +106,7 @@ struct swd_driver {
          * @param value to be written to the register
          *
          * @return SWD_ACK_* code for the transaction
-         *     or (negative) fault code
+         *             or (negative) fault code
          */
         int (*write_reg)(uint8_t cmd, uint32_t value);
 
@@ -111,4 +131,9 @@ struct swd_driver {
        int *(*trace)(bool swo);
 };
 
+int swd_init_reset(struct command_context *cmd_ctx);
+void swd_add_reset(int req_srst);
+
 bool transport_is_swd(void);
+
+#endif /* SWD_H */