* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
+ * Copyright (C) 2007,2008 Øyvind Harboe *
+ * oyvind.harboe@zylin.com *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
#include <stdlib.h>
#include <unistd.h>
-#include <sys/time.h>
-#include <time.h>
-
bitbang_interface_t *bitbang_interface;
+
+/* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
+ *
+ * Set this to 1 and str912 reset halt will fail.
+ *
+ * If someone can submit a patch with an explanation it will be greatly
+ * appreciated, but as far as I can tell (ØH) DCLK is generated upon
+ * clk=0 in TAP_RTI. Good luck deducing that from the ARM documentation!
+ * The ARM documentation uses the term "DCLK is asserted while in the TAP_RTI
+ * state". With hardware there is no such thing as *while* in a state. There
+ * are only edges. So clk => 0 is in fact a very subtle state transition that
+ * happens *while* in the TAP_RTI state. "#&¤"#¤&"#&"#&
+ *
+ * For "reset halt" the last thing that happens before srst is asserted
+ * is that the breakpoint is set up. If DCLK is not wiggled one last
+ * time before the reset, then the breakpoint is not set up and
+ * "reset halt" will fail to halt.
+ *
+ */
+#define CLOCK_IDLE() 0
+
int bitbang_execute_queue(void);
/* The bitbang driver leaves the TCK 0 when in idle */
-
void bitbang_end_state(enum tap_state state)
{
if (tap_move_map[state] != -1)
end_state = state;
else
{
- ERROR("BUG: %i is not a valid end state", state);
+ LOG_ERROR("BUG: %i is not a valid end state", state);
exit(-1);
}
}
bitbang_interface->write(0, tms, 0);
bitbang_interface->write(1, tms, 0);
}
- bitbang_interface->write(0, tms, 0);
+ bitbang_interface->write(CLOCK_IDLE(), tms, 0);
cur_state = end_state;
}
{
int num_states = cmd->num_states;
int state_count;
- int tms;
+ int tms = 0;
state_count = 0;
while (num_states)
}
else
{
- ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[state_count]]);
+ LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[cmd->path[state_count]]);
exit(-1);
}
num_states--;
}
- bitbang_interface->write(0, tms, 0);
+ bitbang_interface->write(CLOCK_IDLE(), tms, 0);
end_state = cur_state;
}
}
/* execute num_cycles */
- bitbang_interface->write(0, 0, 0);
for (i = 0; i < num_cycles; i++)
{
- bitbang_interface->write(1, 0, 0);
bitbang_interface->write(0, 0, 0);
+ bitbang_interface->write(1, 0, 0);
}
+ bitbang_interface->write(CLOCK_IDLE(), 0, 0);
/* finish in end_state */
bitbang_end_state(saved_end_state);
{
enum tap_state saved_end_state = end_state;
int bit_cnt;
- int last_bit, last_bit_in;
if (!((!ir_scan && (cur_state == TAP_SD)) || (ir_scan && (cur_state == TAP_SI))))
{
bitbang_end_state(saved_end_state);
}
- for (bit_cnt = 0; bit_cnt < scan_size - 1; bit_cnt++)
+ for (bit_cnt = 0; bit_cnt < scan_size; bit_cnt++)
{
/* if we're just reading the scan, but don't care about the output
* default to outputting 'low', this also makes valgrind traces more readable,
*/
if ((type != SCAN_IN) && ((buffer[bit_cnt/8] >> (bit_cnt % 8)) & 0x1))
{
- bitbang_interface->write(0, 0, 1);
- bitbang_interface->write(1, 0, 1);
+ bitbang_interface->write(0, (bit_cnt==scan_size-1) ? 1 : 0, 1);
+ bitbang_interface->write(1, (bit_cnt==scan_size-1) ? 1 : 0, 1);
} else {
- bitbang_interface->write(0, 0, 0);
- bitbang_interface->write(1, 0, 0);
+ bitbang_interface->write(0, (bit_cnt==scan_size-1) ? 1 : 0, 0);
+ bitbang_interface->write(1, (bit_cnt==scan_size-1) ? 1 : 0, 0);
}
if (type != SCAN_OUT)
{
+ /*
+ TDO should be sampled on the rising edge, and will change
+ on the falling edge.
+
+ Because there is no way to read the signal exactly at the rising edge,
+ read after the rising edge.
+
+ This is plain IEEE 1149 JTAG - nothing specific to the OpenOCD or its JTAG
+ API.
+ */
if (bitbang_interface->read())
buffer[(bit_cnt)/8] |= 1 << ((bit_cnt) % 8);
else
buffer[(bit_cnt)/8] &= ~(1 << ((bit_cnt) % 8));
}
}
-
- if ((type != SCAN_IN) && ((buffer[bit_cnt/8] >> (bit_cnt % 8)) & 0x1))
- last_bit = 1;
- else
- last_bit = 0;
-
- if ((ir_scan && (end_state == TAP_SI)) ||
- (!ir_scan && (end_state == TAP_SD)))
- {
- bitbang_interface->write(0, 0, last_bit);
- bitbang_interface->write(1, 0, last_bit);
-
- if (type != SCAN_OUT)
- last_bit_in = bitbang_interface->read();
-
- bitbang_interface->write(0, 0, last_bit);
- }
+
+ /* TAP_SD & TAP_SI are illegal end states, so we always transition to the pause
+ * state which is a legal stable state from which statemove will work.
+ *
+ * Exit1 -> Pause
+ */
+ bitbang_interface->write(0, 0, 0);
+ bitbang_interface->write(1, 0, 0);
+ bitbang_interface->write(CLOCK_IDLE(), 0, 0);
+
+ if (ir_scan)
+ cur_state = TAP_PI;
else
- {
- /* Shift-[ID]R -> Exit1-[ID]R */
- bitbang_interface->write(0, 1, last_bit);
- bitbang_interface->write(1, 1, last_bit);
-
- if (type != SCAN_OUT)
- last_bit_in = bitbang_interface->read();
-
- /* Exit1-[ID]R -> Pause-[ID]R */
- bitbang_interface->write(0, 0, 0);
- bitbang_interface->write(1, 0, 0);
-
- if (cur_state == TAP_SI)
- cur_state = TAP_PI;
- else
- cur_state = TAP_PD;
-
- if (cur_state != end_state)
- bitbang_state_move();
- else
- bitbang_interface->write(0, 0, 0);
- }
-
- if (type != SCAN_OUT)
- {
- if (last_bit_in)
- buffer[(bit_cnt)/8] |= 1 << ((bit_cnt) % 8);
- else
- buffer[(bit_cnt)/8] &= ~(1 << ((bit_cnt) % 8));
- }
+ cur_state = TAP_PD;
+
+ if (cur_state != end_state)
+ bitbang_state_move();
}
int bitbang_execute_queue(void)
if (!bitbang_interface)
{
- ERROR("BUG: Bitbang interface called, but not yet initialized");
+ LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
exit(-1);
}
{
case JTAG_END_STATE:
#ifdef _DEBUG_JTAG_IO_
- DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
+ LOG_DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
#endif
if (cmd->cmd.end_state->end_state != -1)
bitbang_end_state(cmd->cmd.end_state->end_state);
break;
case JTAG_RESET:
#ifdef _DEBUG_JTAG_IO_
- DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
+ LOG_DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
#endif
- if (cmd->cmd.reset->trst == 1)
+ if ((cmd->cmd.reset->trst == 1) || (cmd->cmd.reset->srst && (jtag_reset_config & RESET_SRST_PULLS_TRST)))
{
cur_state = TAP_TLR;
}
break;
case JTAG_RUNTEST:
#ifdef _DEBUG_JTAG_IO_
- DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
+ LOG_DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
#endif
if (cmd->cmd.runtest->end_state != -1)
bitbang_end_state(cmd->cmd.runtest->end_state);
break;
case JTAG_STATEMOVE:
#ifdef _DEBUG_JTAG_IO_
- DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
+ LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
#endif
if (cmd->cmd.statemove->end_state != -1)
bitbang_end_state(cmd->cmd.statemove->end_state);
break;
case JTAG_PATHMOVE:
#ifdef _DEBUG_JTAG_IO_
- DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
+ LOG_DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
#endif
bitbang_path_move(cmd->cmd.pathmove);
break;
case JTAG_SCAN:
#ifdef _DEBUG_JTAG_IO_
- DEBUG("%s scan end in %i", (cmd->cmd.scan->ir_scan) ? "IR" : "DR", cmd->cmd.scan->end_state);
+ LOG_DEBUG("%s scan end in %i", (cmd->cmd.scan->ir_scan) ? "IR" : "DR", cmd->cmd.scan->end_state);
#endif
if (cmd->cmd.scan->end_state != -1)
bitbang_end_state(cmd->cmd.scan->end_state);
break;
case JTAG_SLEEP:
#ifdef _DEBUG_JTAG_IO_
- DEBUG("sleep %i", cmd->cmd.sleep->us);
+ LOG_DEBUG("sleep %i", cmd->cmd.sleep->us);
#endif
jtag_sleep(cmd->cmd.sleep->us);
break;
default:
- ERROR("BUG: unknown JTAG command type encountered");
+ LOG_ERROR("BUG: unknown JTAG command type encountered");
exit(-1);
}
cmd = cmd->next;
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