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armv7a_mmu: s/LOG_ERROR/LOG_WARNING/ on address translation failure
[openocd.git] / src / jtag / aice / aice_port.h
diff --git a/src/jtag/aice/aice_port.h b/src/jtag/aice/aice_port.h
index 8f3e855129d5d90b102b1867e6069ba438d5383e..d3d6a1a2c9c29aa007930e0dab1c3f9e88b34b1f 100644 (file)
--- a/src/jtag/aice/aice_port.h
+++ b/src/jtag/aice/aice_port.h
@@ -13,15 +13,16 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
-#ifndef _AICE_PORT_H_
-#define _AICE_PORT_H_
+
+#ifndef OPENOCD_JTAG_AICE_AICE_PORT_H
+#define OPENOCD_JTAG_AICE_AICE_PORT_H
 
 #include <target/nds32_edm.h>
 
+#define AICE_MAX_NUM_CORE      (0x10)
+
 #define ERROR_AICE_DISCONNECT  (-200)
 #define ERROR_AICE_TIMEOUT     (-201)
 
@@ -49,6 +50,8 @@ enum aice_api_s {
        AICE_OPEN = 0x0,
        AICE_CLOSE,
        AICE_RESET,
+       AICE_IDCODE,
+       AICE_SET_JTAG_CLOCK,
        AICE_ASSERT_SRST,
        AICE_RUN,
        AICE_HALT,
@@ -63,10 +66,7 @@ enum aice_api_s {
        AICE_WRITE_MEM_BULK,
        AICE_READ_DEBUG_REG,
        AICE_WRITE_DEBUG_REG,
-       AICE_IDCODE,
        AICE_STATE,
-       AICE_SET_JTAG_CLOCK,
-       AICE_SELECT_TARGET,
        AICE_MEMORY_ACCESS,
        AICE_MEMORY_MODE,
        AICE_READ_TLB,
@@ -105,9 +105,9 @@ enum aice_command_mode {
 
 struct aice_port_param_s {
        /** */
-       char *device_desc;
+       const char *device_desc;
        /** */
-       char *serial;
+       const char *serial;
        /** */
        uint16_t vid;
        /** */
@@ -118,13 +118,9 @@ struct aice_port_param_s {
 
 struct aice_port_s {
        /** */
-       struct aice_port_param_s param;
+       uint32_t coreid;
        /** */
        const struct aice_port *port;
-       /** */
-       uint32_t retry_times;
-       /** */
-       uint32_t count_to_check_dbger;
 };
 
 /** */
@@ -139,70 +135,67 @@ struct aice_port_api_s {
        /** */
        int (*reset)(void);
        /** */
-       int (*assert_srst)(enum aice_srst_type_s srst);
+       int (*idcode)(uint32_t *idcode, uint8_t *num_of_idcode);
        /** */
-       int (*run)(void);
+       int (*set_jtag_clock)(uint32_t a_clock);
        /** */
-       int (*halt)(void);
+       int (*assert_srst)(uint32_t coreid, enum aice_srst_type_s srst);
        /** */
-       int (*step)(void);
+       int (*run)(uint32_t coreid);
        /** */
-       int (*read_reg)(uint32_t num, uint32_t *val);
+       int (*halt)(uint32_t coreid);
        /** */
-       int (*write_reg)(uint32_t num, uint32_t val);
+       int (*step)(uint32_t coreid);
        /** */
-       int (*read_reg_64)(uint32_t num, uint64_t *val);
+       int (*read_reg)(uint32_t coreid, uint32_t num, uint32_t *val);
        /** */
-       int (*write_reg_64)(uint32_t num, uint64_t val);
+       int (*write_reg)(uint32_t coreid, uint32_t num, uint32_t val);
        /** */
-       int (*read_mem_unit)(uint32_t addr, uint32_t size, uint32_t count,
-                       uint8_t *buffer);
+       int (*read_reg_64)(uint32_t coreid, uint32_t num, uint64_t *val);
        /** */
-       int (*write_mem_unit)(uint32_t addr, uint32_t size, uint32_t count,
-                       const uint8_t *buffer);
+       int (*write_reg_64)(uint32_t coreid, uint32_t num, uint64_t val);
+       /** */
+       int (*read_mem_unit)(uint32_t coreid, uint32_t addr, uint32_t size,
+                       uint32_t count, uint8_t *buffer);
+       /** */
+       int (*write_mem_unit)(uint32_t coreid, uint32_t addr, uint32_t size,
+                       uint32_t count, const uint8_t *buffer);
        /** */
-       int (*read_mem_bulk)(uint32_t addr, uint32_t length,
+       int (*read_mem_bulk)(uint32_t coreid, uint32_t addr, uint32_t length,
                        uint8_t *buffer);
        /** */
-       int (*write_mem_bulk)(uint32_t addr, uint32_t length,
+       int (*write_mem_bulk)(uint32_t coreid, uint32_t addr, uint32_t length,
                        const uint8_t *buffer);
        /** */
-       int (*read_debug_reg)(uint32_t addr, uint32_t *val);
+       int (*read_debug_reg)(uint32_t coreid, uint32_t addr, uint32_t *val);
        /** */
-       int (*write_debug_reg)(uint32_t addr, const uint32_t val);
+       int (*write_debug_reg)(uint32_t coreid, uint32_t addr, const uint32_t val);
 
        /** */
-       int (*idcode)(uint32_t *idcode, uint8_t *num_of_idcode);
-       /** */
-       int (*state)(enum aice_target_state_s *state);
+       int (*state)(uint32_t coreid, enum aice_target_state_s *state);
 
        /** */
-       int (*set_jtag_clock)(uint32_t a_clock);
+       int (*memory_access)(uint32_t coreid, enum nds_memory_access a_access);
        /** */
-       int (*select_target)(uint32_t target_id);
+       int (*memory_mode)(uint32_t coreid, enum nds_memory_select mem_select);
 
        /** */
-       int (*memory_access)(enum nds_memory_access a_access);
-       /** */
-       int (*memory_mode)(enum nds_memory_select mem_select);
-
-       /** */
-       int (*read_tlb)(uint32_t virtual_address, uint32_t *physical_address);
+       int (*read_tlb)(uint32_t coreid, target_addr_t virtual_address, target_addr_t *physical_address);
 
        /** */
-       int (*cache_ctl)(uint32_t subtype, uint32_t address);
+       int (*cache_ctl)(uint32_t coreid, uint32_t subtype, uint32_t address);
 
        /** */
        int (*set_retry_times)(uint32_t a_retry_times);
 
        /** */
-       int (*program_edm)(char *command_sequence);
+       int (*program_edm)(uint32_t coreid, char *command_sequence);
 
        /** */
        int (*set_command_mode)(enum aice_command_mode command_mode);
 
        /** */
-       int (*execute)(uint32_t *instructions, uint32_t instruction_num);
+       int (*execute)(uint32_t coreid, uint32_t *instructions, uint32_t instruction_num);
 
        /** */
        int (*set_custom_srst_script)(const char *script);
@@ -217,7 +210,11 @@ struct aice_port_api_s {
        int (*set_count_to_check_dbger)(uint32_t count_to_check);
 
        /** */
-       int (*set_data_endian)(enum aice_target_endian target_data_endian);
+       int (*set_data_endian)(uint32_t coreid, enum aice_target_endian target_data_endian);
+
+       /** */
+       int (*profiling)(uint32_t coreid, uint32_t interval, uint32_t iteration,
+               uint32_t reg_no, uint32_t *samples, uint32_t *num_samples);
 };
 
 #define AICE_PORT_UNKNOWN      0
@@ -227,14 +224,14 @@ struct aice_port_api_s {
 /** */
 struct aice_port {
        /** */
-       char *name;
+       const char *name;
        /** */
        int type;
        /** */
-       struct aice_port_api_s *api;
+       struct aice_port_api_s *const api;
 };
 
 /** */
 const struct aice_port *aice_port_get_list(void);
 
-#endif
+#endif /* OPENOCD_JTAG_AICE_AICE_PORT_H */
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