* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
+ * Copyright (C) 2008 by Spencer Oliver *
+ * spen@spen-soft.co.uk *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
#include <stdlib.h>
#include <string.h>
-int stm32x_register_commands(struct command_context_s *cmd_ctx);
-int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int stm32x_erase(struct flash_bank_s *bank, int first, int last);
-int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last);
-int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int stm32x_probe(struct flash_bank_s *bank);
-int stm32x_auto_probe(struct flash_bank_s *bank);
-int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_protect_check(struct flash_bank_s *bank);
-int stm32x_erase_check(struct flash_bank_s *bank);
-int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_register_commands(struct command_context_s *cmd_ctx);
+static int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int stm32x_erase(struct flash_bank_s *bank, int first, int last);
+static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int stm32x_probe(struct flash_bank_s *bank);
+static int stm32x_auto_probe(struct flash_bank_s *bank);
+//static int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_protect_check(struct flash_bank_s *bank);
+static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+static int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_mass_erase(struct flash_bank_s *bank);
flash_driver_t stm32x_flash =
{
.write = stm32x_write,
.probe = stm32x_probe,
.auto_probe = stm32x_auto_probe,
- .erase_check = stm32x_erase_check,
+ .erase_check = default_flash_mem_blank_check,
.protect_check = stm32x_protect_check,
.info = stm32x_info
};
-int stm32x_register_commands(struct command_context_s *cmd_ctx)
+static int stm32x_register_commands(struct command_context_s *cmd_ctx)
{
command_t *stm32x_cmd = register_command(cmd_ctx, NULL, "stm32x", NULL, COMMAND_ANY, "stm32x flash specific commands");
/* flash bank stm32x <base> <size> 0 0 <target#>
*/
-int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
stm32x_flash_bank_t *stm32x_info;
if (argc < 6)
{
- WARNING("incomplete flash_bank stm32x configuration");
+ LOG_WARNING("incomplete flash_bank stm32x configuration");
return ERROR_FLASH_BANK_INVALID;
}
return ERROR_OK;
}
-u32 stm32x_get_flash_status(flash_bank_t *bank)
+static u32 stm32x_get_flash_status(flash_bank_t *bank)
{
target_t *target = bank->target;
u32 status;
return status;
}
-u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
+static u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
{
+ target_t *target = bank->target;
u32 status;
/* wait for busy to clear */
while (((status = stm32x_get_flash_status(bank)) & FLASH_BSY) && (timeout-- > 0))
{
- DEBUG("status: 0x%x", status);
- usleep(1000);
+ LOG_DEBUG("status: 0x%x", status);
+ alive_sleep(1);
+ }
+ /* Clear but report errors */
+ if (status & (FLASH_WRPRTERR|FLASH_PGERR))
+ {
+ target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR|FLASH_PGERR);
}
-
return status;
}
-int stm32x_read_options(struct flash_bank_s *bank)
+static int stm32x_read_options(struct flash_bank_s *bank)
{
u32 optiondata;
stm32x_flash_bank_t *stm32x_info = NULL;
stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
if (optiondata & (1 << OPT_READOUT))
- INFO("Device Security Bit Set");
+ LOG_INFO("Device Security Bit Set");
/* each bit refers to a 4bank protection */
target_read_u32(target, STM32_FLASH_WRPR, &optiondata);
return ERROR_OK;
}
-int stm32x_erase_options(struct flash_bank_s *bank)
+static int stm32x_erase_options(struct flash_bank_s *bank)
{
stm32x_flash_bank_t *stm32x_info = NULL;
target_t *target = bank->target;
return ERROR_OK;
}
-int stm32x_write_options(struct flash_bank_s *bank)
+static int stm32x_write_options(struct flash_bank_s *bank)
{
stm32x_flash_bank_t *stm32x_info = NULL;
target_t *target = bank->target;
return ERROR_OK;
}
-int stm32x_blank_check(struct flash_bank_s *bank, int first, int last)
-{
- target_t *target = bank->target;
- u8 *buffer;
- int i;
- int nBytes;
-
- if ((first < 0) || (last > bank->num_sectors))
- return ERROR_FLASH_SECTOR_INVALID;
-
- if (target->state != TARGET_HALTED)
- {
- return ERROR_TARGET_NOT_HALTED;
- }
-
- buffer = malloc(256);
-
- for (i = first; i <= last; i++)
- {
- bank->sectors[i].is_erased = 1;
-
- target->type->read_memory(target, bank->base + bank->sectors[i].offset, 4, 256/4, buffer);
-
- for (nBytes = 0; nBytes < 256; nBytes++)
- {
- if (buffer[nBytes] != 0xFF)
- {
- bank->sectors[i].is_erased = 0;
- break;
- }
- }
- }
-
- free(buffer);
-
- return ERROR_OK;
-}
-
-int stm32x_protect_check(struct flash_bank_s *bank)
+static int stm32x_protect_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
+ stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
u32 protection;
int i, s;
int num_bits;
-
+ int set;
+
if (target->state != TARGET_HALTED)
{
+ LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
-
- /* each bit refers to a 4bank protection */
+
+ /* medium density - each bit refers to a 4bank protection
+ * high density - each bit refers to a 2bank protection */
target_read_u32(target, STM32_FLASH_WRPR, &protection);
- /* each protection bit is for 4 1K pages */
- num_bits = (bank->num_sectors / 4);
+ /* medium density - each protection bit is for 4 * 1K pages
+ * high density - each protection bit is for 2 * 2K pages */
+ num_bits = (bank->num_sectors / stm32x_info->ppage_size);
- for (i = 0; i < num_bits; i++)
+ if (stm32x_info->ppage_size == 2)
{
- int set = 1;
+ /* high density flash */
- if( protection & (1 << i))
+ set = 1;
+
+ if (protection & (1 << 31))
set = 0;
- for (s = 0; s < 4; s++)
- bank->sectors[(i * 4) + s].is_protected = set;
+ /* bit 31 controls sector 62 - 255 protection */
+ for (s = 62; s < bank->num_sectors; s++)
+ {
+ bank->sectors[s].is_protected = set;
+ }
+
+ if (bank->num_sectors > 61)
+ num_bits = 31;
+
+ for (i = 0; i < num_bits; i++)
+ {
+ set = 1;
+
+ if (protection & (1 << i))
+ set = 0;
+
+ for (s = 0; s < stm32x_info->ppage_size; s++)
+ bank->sectors[(i * stm32x_info->ppage_size) + s].is_protected = set;
+ }
}
-
+ else
+ {
+ /* medium density flash */
+ for (i = 0; i < num_bits; i++)
+ {
+ set = 1;
+
+ if( protection & (1 << i))
+ set = 0;
+
+ for (s = 0; s < stm32x_info->ppage_size; s++)
+ bank->sectors[(i * stm32x_info->ppage_size) + s].is_protected = set;
+ }
+ }
+
return ERROR_OK;
}
-int stm32x_erase(struct flash_bank_s *bank, int first, int last)
+static int stm32x_erase(struct flash_bank_s *bank, int first, int last)
{
target_t *target = bank->target;
-
int i;
u32 status;
- if (target->state != TARGET_HALTED)
+ if (bank->target->state != TARGET_HALTED)
{
+ LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
+ if ((first == 0) && (last == (bank->num_sectors - 1)))
+ {
+ return stm32x_mass_erase(bank);
+ }
+
/* unlock flash registers */
target_write_u32(target, STM32_FLASH_KEYR, KEY1);
target_write_u32(target, STM32_FLASH_KEYR, KEY2);
return ERROR_OK;
}
-int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
stm32x_flash_bank_t *stm32x_info = NULL;
target_t *target = bank->target;
if (target->state != TARGET_HALTED)
{
+ LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
- if ((first && (first % 4)) || ((last + 1) && (last + 1) % 4))
+ if ((first && (first % stm32x_info->ppage_size)) || ((last + 1) && (last + 1) % stm32x_info->ppage_size))
{
- WARNING("sector start/end incorrect - stm32 has 4K sector protection");
+ LOG_WARNING("sector start/end incorrect - stm32 has %dK sector protection", stm32x_info->ppage_size);
return ERROR_FLASH_SECTOR_INVALID;
}
- /* each bit refers to a 4bank protection */
+ /* medium density - each bit refers to a 4bank protection
+ * high density - each bit refers to a 2bank protection */
target_read_u32(target, STM32_FLASH_WRPR, &protection);
prot_reg[0] = (u16)protection;
prot_reg[2] = (u16)(protection >> 16);
prot_reg[3] = (u16)(protection >> 24);
- for (i = first; i <= last; i++)
+ if (stm32x_info->ppage_size == 2)
{
- reg = (i / 4) / 8;
- bit = (i / 4) - (reg * 8);
+ /* high density flash */
- if( set )
- prot_reg[reg] &= ~(1 << bit);
- else
- prot_reg[reg] |= (1 << bit);
+ /* bit 7 controls sector 62 - 255 protection */
+ if (last > 61)
+ {
+ if (set)
+ prot_reg[3] &= ~(1 << 7);
+ else
+ prot_reg[3] |= (1 << 7);
+ }
+
+ if (first > 61)
+ first = 62;
+ if (last > 61)
+ last = 61;
+
+ for (i = first; i <= last; i++)
+ {
+ reg = (i / stm32x_info->ppage_size) / 8;
+ bit = (i / stm32x_info->ppage_size) - (reg * 8);
+
+ if( set )
+ prot_reg[reg] &= ~(1 << bit);
+ else
+ prot_reg[reg] |= (1 << bit);
+ }
+ }
+ else
+ {
+ /* medium density flash */
+ for (i = first; i <= last; i++)
+ {
+ reg = (i / stm32x_info->ppage_size) / 8;
+ bit = (i / stm32x_info->ppage_size) - (reg * 8);
+
+ if( set )
+ prot_reg[reg] &= ~(1 << bit);
+ else
+ prot_reg[reg] |= (1 << bit);
+ }
}
if ((status = stm32x_erase_options(bank)) != ERROR_OK)
return stm32x_write_options(bank);
}
-int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
target_t *target = bank->target;
- u32 buffer_size = 8192;
+ u32 buffer_size = 16384;
working_area_t *source;
u32 address = bank->base + offset;
reg_param_t reg_params[4];
0x01, 0x3A, /* subs r2, r2, #1 */
0xED, 0xD1, /* bne write */
/* exit: */
- 0xFE, 0xE7, /* b exit */
+ 0xFE, 0xE7, /* b exit */
0x10, 0x20, 0x02, 0x40, /* STM32_FLASH_CR: .word 0x40022010 */
0x0C, 0x20, 0x02, 0x40 /* STM32_FLASH_SR: .word 0x4002200C */
};
/* flash write code */
if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), &stm32x_info->write_algorithm) != ERROR_OK)
{
- WARNING("no working area available, can't do block memory writes");
+ LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
- target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code);
+ if ((retval=target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code))!=ERROR_OK)
+ return retval;
/* memory buffer */
while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
if (stm32x_info->write_algorithm)
target_free_working_area(target, stm32x_info->write_algorithm);
- WARNING("no large enough working area available, can't do block memory writes");
+ LOG_WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
};
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARMV7M_MODE_ANY;
- armv7m_info.core_state = ARMV7M_STATE_THUMB;
init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
{
u32 thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
- target_write_buffer(target, source->address, thisrun_count * 2, buffer);
+ if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer))!=ERROR_OK)
+ break;
buf_set_u32(reg_params[0].value, 0, 32, source->address);
buf_set_u32(reg_params[1].value, 0, 32, address);
if ((retval = target->type->run_algorithm(target, 0, NULL, 4, reg_params, stm32x_info->write_algorithm->address, \
stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10), 10000, &armv7m_info)) != ERROR_OK)
{
- ERROR("error executing str7x flash write algorithm");
+ LOG_ERROR("error executing stm32x flash write algorithm");
+ retval = ERROR_FLASH_OPERATION_FAILED;
+ break;
+ }
+
+ if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR)
+ {
+ LOG_ERROR("flash memory not erased before writing");
+ /* Clear but report errors */
+ target_write_u32(target, STM32_FLASH_SR, FLASH_PGERR);
+ retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
- if (buf_get_u32(reg_params[3].value, 0, 32) & 0x14)
+ if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR)
{
+ LOG_ERROR("flash memory write protected");
+ /* Clear but report errors */
+ target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
return retval;
}
-int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
target_t *target = bank->target;
u32 words_remaining = (count / 2);
u32 address = bank->base + offset;
u32 bytes_written = 0;
u8 status;
- u32 retval;
+ int retval;
- if (target->state != TARGET_HALTED)
+ if (bank->target->state != TARGET_HALTED)
{
+ LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
-
+
if (offset & 0x1)
{
- WARNING("offset 0x%x breaks required 2-byte alignment", offset);
+ LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
{
/* if block write failed (no sufficient working area),
* we use normal (slow) single dword accesses */
- WARNING("couldn't use block writes, falling back to single memory accesses");
+ LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
}
else if (retval == ERROR_FLASH_OPERATION_FAILED)
{
- ERROR("flash writing failed with error code: 0x%x", retval);
+ LOG_ERROR("flash writing failed with error code: 0x%x", retval);
return ERROR_FLASH_OPERATION_FAILED;
}
}
status = stm32x_wait_status_busy(bank, 5);
if( status & FLASH_WRPRTERR )
+ {
+ LOG_ERROR("flash memory not erased before writing");
return ERROR_FLASH_OPERATION_FAILED;
+ }
if( status & FLASH_PGERR )
+ {
+ LOG_ERROR("flash memory write protected");
return ERROR_FLASH_OPERATION_FAILED;
+ }
bytes_written += 2;
words_remaining--;
status = stm32x_wait_status_busy(bank, 5);
if( status & FLASH_WRPRTERR )
+ {
+ LOG_ERROR("flash memory not erased before writing");
return ERROR_FLASH_OPERATION_FAILED;
+ }
if( status & FLASH_PGERR )
+ {
+ LOG_ERROR("flash memory write protected");
return ERROR_FLASH_OPERATION_FAILED;
+ }
}
target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
return ERROR_OK;
}
-int stm32x_probe(struct flash_bank_s *bank)
+static int stm32x_probe(struct flash_bank_s *bank)
{
target_t *target = bank->target;
stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
int i;
- u16 num_sectors;
+ u16 num_pages;
u32 device_id;
+ int page_size;
+ if (bank->target->state != TARGET_HALTED)
+ {
+ LOG_ERROR("Target not halted");
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
stm32x_info->probed = 0;
/* read stm32 device id register */
target_read_u32(target, 0xE0042000, &device_id);
- INFO( "device id = 0x%08x", device_id );
+ LOG_INFO( "device id = 0x%08x", device_id );
- if (!(device_id & 0x410))
- {
- WARNING( "Cannot identify target as a STM32 family." );
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
/* get flash size from target */
- target_read_u16(target, 0x1FFFF7E0, &num_sectors);
+ if (target_read_u16(target, 0x1FFFF7E0, &num_pages) != ERROR_OK)
+ {
+ /* failed reading flash size, default to max target family */
+ num_pages = 0xffff;
+ }
- /* check for early silicon rev A */
- if ((device_id >> 16) == 0 )
+ if ((device_id & 0x7ff) == 0x410)
+ {
+ /* medium density - we have 1k pages
+ * 4 pages for a protection area */
+ page_size = 1024;
+ stm32x_info->ppage_size = 4;
+
+ /* check for early silicon */
+ if (num_pages == 0xffff)
+ {
+ /* number of sectors incorrect on revA */
+ LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 128k flash" );
+ num_pages = 128;
+ }
+ }
+ else if ((device_id & 0x7ff) == 0x412)
+ {
+ /* low density - we have 1k pages
+ * 4 pages for a protection area */
+ page_size = 1024;
+ stm32x_info->ppage_size = 4;
+
+ /* check for early silicon */
+ if (num_pages == 0xffff)
+ {
+ /* number of sectors incorrect on revA */
+ LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 32k flash" );
+ num_pages = 32;
+ }
+ }
+ else if ((device_id & 0x7ff) == 0x414)
{
- /* number of sectors incorrect on revA */
- WARNING( "STM32 Rev A Silicon detected, probe inaccurate - assuming 128k flash" );
- num_sectors = 128;
+ /* high density - we have 2k pages
+ * 2 pages for a protection area */
+ page_size = 2048;
+ stm32x_info->ppage_size = 2;
+
+ /* check for early silicon */
+ if (num_pages == 0xffff)
+ {
+ /* number of sectors incorrect on revZ */
+ LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 512k flash" );
+ num_pages = 512;
+ }
}
+ else if ((device_id & 0x7ff) == 0x418)
+ {
+ /* connectivity line density - we have 1k pages
+ * 4 pages for a protection area */
+ page_size = 1024;
+ stm32x_info->ppage_size = 4;
+
+ /* check for early silicon */
+ if (num_pages == 0xffff)
+ {
+ /* number of sectors incorrect on revZ */
+ LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 256k flash" );
+ num_pages = 256;
+ }
+ }
+ else
+ {
+ LOG_WARNING( "Cannot identify target as a STM32 family." );
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+
+ LOG_INFO( "flash size = %dkbytes", num_pages );
- INFO( "flash size = %dkbytes", num_sectors );
+ /* calculate numbers of pages */
+ num_pages /= (page_size / 1024);
bank->base = 0x08000000;
- bank->size = num_sectors * 1024;
- bank->num_sectors = num_sectors;
- bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
+ bank->size = (num_pages * page_size);
+ bank->num_sectors = num_pages;
+ bank->sectors = malloc(sizeof(flash_sector_t) * num_pages);
- for (i = 0; i < num_sectors; i++)
+ for (i = 0; i < num_pages; i++)
{
- bank->sectors[i].offset = i * 1024;
- bank->sectors[i].size = 1024;
+ bank->sectors[i].offset = i * page_size;
+ bank->sectors[i].size = page_size;
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 1;
}
return ERROR_OK;
}
-int stm32x_auto_probe(struct flash_bank_s *bank)
+static int stm32x_auto_probe(struct flash_bank_s *bank)
{
stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
if (stm32x_info->probed)
return stm32x_probe(bank);
}
-int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+#if 0
+static int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
return ERROR_OK;
}
+#endif
-int stm32x_erase_check(struct flash_bank_s *bank)
+static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
- return stm32x_blank_check(bank, 0, bank->num_sectors - 1);
-}
+ target_t *target = bank->target;
+ u32 device_id;
+ int printed;
+
+ /* read stm32 device id register */
+ target_read_u32(target, 0xE0042000, &device_id);
+
+ if ((device_id & 0x7ff) == 0x410)
+ {
+ printed = snprintf(buf, buf_size, "stm32x (Medium Density) - Rev: ");
+ buf += printed;
+ buf_size -= printed;
+
+ switch(device_id >> 16)
+ {
+ case 0x0000:
+ snprintf(buf, buf_size, "A");
+ break;
+
+ case 0x2000:
+ snprintf(buf, buf_size, "B");
+ break;
+
+ case 0x2001:
+ snprintf(buf, buf_size, "Z");
+ break;
+
+ case 0x2003:
+ snprintf(buf, buf_size, "Y");
+ break;
+
+ default:
+ snprintf(buf, buf_size, "unknown");
+ break;
+ }
+ }
+ else if ((device_id & 0x7ff) == 0x412)
+ {
+ printed = snprintf(buf, buf_size, "stm32x (Low Density) - Rev: ");
+ buf += printed;
+ buf_size -= printed;
+
+ switch(device_id >> 16)
+ {
+ case 0x1000:
+ snprintf(buf, buf_size, "A");
+ break;
+
+ default:
+ snprintf(buf, buf_size, "unknown");
+ break;
+ }
+ }
+ else if ((device_id & 0x7ff) == 0x414)
+ {
+ printed = snprintf(buf, buf_size, "stm32x (High Density) - Rev: ");
+ buf += printed;
+ buf_size -= printed;
+
+ switch(device_id >> 16)
+ {
+ case 0x1000:
+ snprintf(buf, buf_size, "A");
+ break;
+
+ case 0x1001:
+ snprintf(buf, buf_size, "Z");
+ break;
+
+ default:
+ snprintf(buf, buf_size, "unknown");
+ break;
+ }
+ }
+ else if ((device_id & 0x7ff) == 0x418)
+ {
+ printed = snprintf(buf, buf_size, "stm32x (Connectivity) - Rev: ");
+ buf += printed;
+ buf_size -= printed;
+
+ switch(device_id >> 16)
+ {
+ case 0x1000:
+ snprintf(buf, buf_size, "A");
+ break;
-int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size)
-{
- snprintf(buf, buf_size, "stm32x flash driver info" );
+ default:
+ snprintf(buf, buf_size, "unknown");
+ break;
+ }
+ }
+ else
+ {
+ snprintf(buf, buf_size, "Cannot identify target as a stm32x\n");
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+
return ERROR_OK;
}
-int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
target_t *target = NULL;
if (target->state != TARGET_HALTED)
{
+ LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
return ERROR_OK;
}
-int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
target_t *target = NULL;
if (target->state != TARGET_HALTED)
{
+ LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
return ERROR_OK;
}
-int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
u32 optionbyte;
if (target->state != TARGET_HALTED)
{
+ LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
return ERROR_OK;
}
-int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
target_t *target = NULL;
if (argc < 4)
{
command_print(cmd_ctx, "stm32x options_write <bank> <SWWDG|HWWDG> <RSTSTNDBY|NORSTSTNDBY> <RSTSTOP|NORSTSTOP>");
- return ERROR_OK;
+ return ERROR_OK;
}
bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
if (target->state != TARGET_HALTED)
{
+ LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
return ERROR_OK;
}
-int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stm32x_mass_erase(struct flash_bank_s *bank)
{
- target_t *target = NULL;
- stm32x_flash_bank_t *stm32x_info = NULL;
- flash_bank_t *bank;
+ target_t *target = bank->target;
u32 status;
- if (argc < 1)
- {
- command_print(cmd_ctx, "stm32x mass_erase <bank>");
- return ERROR_OK;
- }
-
- bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
- if (!bank)
- {
- command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
- return ERROR_OK;
- }
-
- stm32x_info = bank->driver_priv;
-
- target = bank->target;
-
if (target->state != TARGET_HALTED)
{
+ LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
if( status & FLASH_WRPRTERR )
{
- command_print(cmd_ctx, "stm32x device protected");
+ LOG_ERROR("stm32x device protected");
return ERROR_OK;
}
if( status & FLASH_PGERR )
{
- command_print(cmd_ctx, "stm32x device programming failed");
+ LOG_ERROR("stm32x device programming failed");
return ERROR_OK;
}
- command_print(cmd_ctx, "stm32x mass erase complete");
+ return ERROR_OK;
+}
+
+static int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+ flash_bank_t *bank;
+ int i;
+
+ if (argc < 1)
+ {
+ command_print(cmd_ctx, "stm32x mass_erase <bank>");
+ return ERROR_OK;
+ }
+
+ bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
+ if (!bank)
+ {
+ command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
+ return ERROR_OK;
+ }
+
+ if (stm32x_mass_erase(bank) == ERROR_OK)
+ {
+ /* set all sectors as erased */
+ for (i = 0; i < bank->num_sectors; i++)
+ {
+ bank->sectors[i].is_erased = 1;
+ }
+
+ command_print(cmd_ctx, "stm32x mass erase complete");
+ }
+ else
+ {
+ command_print(cmd_ctx, "stm32x mass erase failed");
+ }
return ERROR_OK;
}