flash/nor: use target_addr_t for flash bank base

[openocd.git] / src / flash / nor / pic32mx.c

diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c
index de212ed362b5b88998eeb33cfdc648256a1f3ed5..852a8bd6f0a5209d761c064ecd56039f3a99c625 100644 (file)
--- a/src/flash/nor/pic32mx.c
+++ b/src/flash/nor/pic32mx.c
@@ -620,7 +620,7 @@ static int pic32mx_write(struct flash_bank *bank, const uint8_t *buffer, uint32_
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       LOG_DEBUG("writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32
+       LOG_DEBUG("writing to flash at address " TARGET_ADDR_FMT " at offset 0x%8.8" PRIx32
                        " count: 0x%8.8" PRIx32 "", bank->base, offset, count);
 
        if (offset & 0x3) {
@@ -879,7 +879,6 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
 
 COMMAND_HANDLER(pic32mx_handle_unlock_command)
 {
-       uint32_t mchip_cmd;
        struct target *target = NULL;
        struct mips_m4k_common *mips_m4k;
        struct mips_ejtag *ejtag_info;
@@ -904,7 +903,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
        mips_ejtag_set_instr(ejtag_info, MTAP_COMMAND);
 
        /* first check status of device */
-       mchip_cmd = MCHP_STATUS;
+       uint8_t mchip_cmd = MCHP_STATUS;
        mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
        if (mchip_cmd & (1 << 7)) {
                /* device is not locked */
@@ -981,4 +980,5 @@ struct flash_driver pic32mx_flash = {
        .erase_check = default_flash_blank_check,
        .protect_check = pic32mx_protect_check,
        .info = pic32mx_info,
+       .free_driver_priv = default_flash_free_driver_priv,
 };