+ int res2 = nrf5_wait_for_nvmc(chip);
+
+ if (res == ERROR_OK)
+ res = res2;
+
+ if (res == ERROR_OK)
+ LOG_INFO("A reset or power cycle is required for the new protection settings to take effect.");
+ else
+ LOG_ERROR("Couldn't write code region 0 size to UICR");
+
+error:
+ nrf5_nvmc_read_only(chip);
+
+ return res;
+}
+
+static int nrf5_protect(struct flash_bank *bank, int set, unsigned int first,
+ unsigned int last)
+{
+ int res;
+ struct nrf5_info *chip;
+
+ /* UICR cannot be write protected so just bail out early */
+ if (bank->base == NRF5_UICR_BASE) {
+ LOG_ERROR("UICR page does not support protection");
+ return ERROR_FLASH_OPER_UNSUPPORTED;
+ }
+
+ res = nrf5_get_probed_chip_if_halted(bank, &chip);
+ if (res != ERROR_OK)
+ return res;
+
+ if (chip->features & NRF5_FEATURE_SERIES_51)
+ return nrf5_protect_clenr0(bank, set, first, last);
+
+ LOG_ERROR("Flash protection setting is not supported on this nRF5 device");
+ return ERROR_FLASH_OPER_UNSUPPORTED;
+}
+
+static bool nrf5_info_variant_to_str(uint32_t variant, char *bf)
+{
+ uint8_t b[4];
+
+ h_u32_to_be(b, variant);
+ if (isalnum(b[0]) && isalnum(b[1]) && isalnum(b[2]) && isalnum(b[3])) {
+ memcpy(bf, b, 4);
+ bf[4] = 0;
+ return true;
+ }
+
+ strcpy(bf, "xxxx");
+ return false;
+}
+
+static const char *nrf5_decode_info_package(uint32_t package)
+{
+ for (size_t i = 0; i < ARRAY_SIZE(nrf5_packages_table); i++) {
+ if (nrf5_packages_table[i].package == package)
+ return nrf5_packages_table[i].code;
+ }
+ return "xx";
+}
+
+static int nrf5_info(struct flash_bank *bank, char *buf, int buf_size)
+{
+ struct nrf5_bank *nbank = bank->driver_priv;
+ struct nrf5_info *chip = nbank->chip;
+ int res;
+
+ if (chip->spec) {
+ res = snprintf(buf, buf_size,
+ "nRF%s-%s(build code: %s)",
+ chip->spec->part, chip->spec->variant, chip->spec->build_code);
+
+ } else if (chip->ficr_info_valid) {
+ char variant[5];
+ nrf5_info_variant_to_str(chip->ficr_info.variant, variant);
+ res = snprintf(buf, buf_size,
+ "nRF%" PRIx32 "-%s%.2s(build code: %s)",
+ chip->ficr_info.part,
+ nrf5_decode_info_package(chip->ficr_info.package),
+ variant, &variant[2]);
+
+ } else {
+ res = snprintf(buf, buf_size, "nRF51xxx (HWID 0x%04" PRIx16 ")",
+ chip->hwid);
+ }
+ if (res <= 0)
+ return ERROR_FAIL;
+
+ snprintf(buf + res, buf_size - res, " %ukB Flash, %ukB RAM",
+ chip->flash_size_kb, chip->ram_size_kb);