#include "config.h"
#endif
-#include "replacements.h"
-#include "log.h"
-
-#include <stdlib.h>
-#include <string.h>
-#include <inttypes.h>
-
-#include <errno.h>
-
#include "nand.h"
-#include "flash.h"
#include "time_support.h"
#include "fileio.h"
-#include "image.h"
-int nand_register_commands(struct command_context_s *cmd_ctx);
-int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+#include <inttypes.h>
+
-int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
+static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+static int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+//static int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
+
+static int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
/* NAND flash controller
*/
extern nand_flash_controller_t lpc3180_nand_controller;
+extern nand_flash_controller_t orion_nand_controller;
extern nand_flash_controller_t s3c2410_nand_controller;
extern nand_flash_controller_t s3c2412_nand_controller;
extern nand_flash_controller_t s3c2440_nand_controller;
/* extern nand_flash_controller_t boundary_scan_nand_controller; */
-nand_flash_controller_t *nand_flash_controllers[] =
+static nand_flash_controller_t *nand_flash_controllers[] =
{
&lpc3180_nand_controller,
+ &orion_nand_controller,
&s3c2410_nand_controller,
&s3c2412_nand_controller,
&s3c2440_nand_controller,
};
/* configured NAND devices and NAND Flash command handler */
-nand_device_t *nand_devices = NULL;
+static nand_device_t *nand_devices = NULL;
static command_t *nand_cmd;
/* Chip ID list
* 256 256 Byte page size
* 512 512 Byte page size
*/
-nand_info_t nand_flash_ids[] =
+static nand_info_t nand_flash_ids[] =
{
{"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
{"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
{"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16},
{"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
- {NULL, 0,}
+ {NULL, 0, 0, 0, 0, 0 }
};
/* Manufacturer ID list
*/
-nand_manufacturer_t nand_manuf_ids[] =
+static nand_manufacturer_t nand_manuf_ids[] =
{
{0x0, "unknown"},
{NAND_MFR_TOSHIBA, "Toshiba"},
{0x0, NULL},
};
+/*
+ * Define default oob placement schemes for large and small page devices
+ */
+
+#if 0
+static nand_ecclayout_t nand_oob_8 = {
+ .eccbytes = 3,
+ .eccpos = {0, 1, 2},
+ .oobfree = {
+ {.offset = 3,
+ .length = 2},
+ {.offset = 6,
+ .length = 2}}
+};
+#endif
+
+static nand_ecclayout_t nand_oob_16 = {
+ .eccbytes = 6,
+ .eccpos = {0, 1, 2, 3, 6, 7},
+ .oobfree = {
+ {.offset = 8,
+ . length = 8}}
+};
+
+static nand_ecclayout_t nand_oob_64 = {
+ .eccbytes = 24,
+ .eccpos = {
+ 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55,
+ 56, 57, 58, 59, 60, 61, 62, 63},
+ .oobfree = {
+ {.offset = 2,
+ .length = 38}}
+};
+
/* nand device <nand_controller> [controller options]
*/
-int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int i;
int retval;
if (argc < 1)
{
- WARNING("incomplete flash device nand configuration");
+ LOG_WARNING("incomplete flash device nand configuration");
return ERROR_FLASH_BANK_INVALID;
}
if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
{
/* register flash specific commands */
- if (nand_flash_controllers[i]->register_commands(cmd_ctx) != ERROR_OK)
+ if ((retval = nand_flash_controllers[i]->register_commands(cmd_ctx)) != ERROR_OK)
{
- ERROR("couldn't register '%s' commands", args[0]);
- exit(-1);
+ LOG_ERROR("couldn't register '%s' commands", args[0]);
+ return retval;
}
c = malloc(sizeof(nand_device_t));
if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
{
- ERROR("'%s' driver rejected nand flash", c->controller->name);
+ LOG_ERROR("'%s' driver rejected nand flash", c->controller->name);
free(c);
return ERROR_OK;
}
/* no valid NAND controller was found (i.e. the configuration option,
* didn't match one of the compiled-in controllers)
*/
- ERROR("No valid NAND flash controller found (%s)", args[0]);
- ERROR("compiled-in NAND flash controllers:");
+ LOG_ERROR("No valid NAND flash controller found (%s)", args[0]);
+ LOG_ERROR("compiled-in NAND flash controllers:");
for (i = 0; nand_flash_controllers[i]; i++)
{
- ERROR("%i: %s", i, nand_flash_controllers[i]->name);
+ LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name);
}
return ERROR_OK;
register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
"dump from NAND flash device <num> <filename> <offset> <size> [options]");
register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
- "write to NAND flash device <num> <filename> <offset> [options]");
+ "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only|oob_softecc]");
register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
"raw access to NAND flash device <num> ['enable'|'disable']");
}
return NULL;
}
-int nand_build_bbt(struct nand_device_s *device, int first, int last)
+static int nand_build_bbt(struct nand_device_s *device, int first, int last)
{
u32 page = 0x0;
int i;
- u8 *oob;
-
- oob = malloc(6);
+ u8 oob[6];
if ((first < 0) || (first >= device->num_blocks))
first = 0;
|| (((device->page_size == 512) && (oob[5] != 0xff)) ||
((device->page_size == 2048) && (oob[0] != 0xff))))
{
- WARNING("invalid block: %i", i);
+ LOG_WARNING("invalid block: %i", i);
device->blocks[i].is_bad = 1;
}
else
/* Send read status command */
device->controller->command(device, NAND_CMD_STATUS);
- usleep(1000);
+ alive_sleep(1);
/* read status */
if (device->device->options & NAND_BUSWIDTH_16)
return ERROR_OK;
}
+static int nand_poll_ready(struct nand_device_s *device, int timeout)
+{
+ u8 status;
+
+ device->controller->command(device, NAND_CMD_STATUS);
+ do {
+ if (device->device->options & NAND_BUSWIDTH_16) {
+ u16 data;
+ device->controller->read_data(device, &data);
+ status = data & 0xff;
+ } else {
+ device->controller->read_data(device, &status);
+ }
+ if (status & NAND_STATUS_READY)
+ break;
+ alive_sleep(1);
+ } while (timeout--);
+
+ return (status & NAND_STATUS_READY) != 0;
+}
+
int nand_probe(struct nand_device_s *device)
{
u8 manufacturer_id, device_id;
- u8 id_buff[5];
+ u8 id_buff[6];
int retval;
int i;
switch (retval)
{
case ERROR_NAND_OPERATION_FAILED:
- DEBUG("controller initialization failed");
+ LOG_DEBUG("controller initialization failed");
return ERROR_NAND_OPERATION_FAILED;
case ERROR_NAND_OPERATION_NOT_SUPPORTED:
- ERROR("BUG: controller reported that it doesn't support default parameters");
+ LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
return ERROR_NAND_OPERATION_FAILED;
default:
- ERROR("BUG: unknown controller initialization failure");
+ LOG_ERROR("BUG: unknown controller initialization failure");
return ERROR_NAND_OPERATION_FAILED;
}
}
if (!device->device)
{
- ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
+ LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
manufacturer_id, device_id);
return ERROR_NAND_OPERATION_FAILED;
}
- DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
+ LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
/* initialize device parameters */
}
else if (device->device->page_size == 256)
{
- ERROR("NAND flashes with 256 byte pagesize are not supported");
+ LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
return ERROR_NAND_OPERATION_FAILED;
}
else
device->address_cycles = 4;
else
{
- ERROR("BUG: small page NAND device with more than 8 GiB encountered");
+ LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
device->address_cycles = 5;
}
}
device->address_cycles = 5;
else
{
- ERROR("BUG: small page NAND device with more than 32 GiB encountered");
+ LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
device->address_cycles = 6;
}
}
switch (retval)
{
case ERROR_NAND_OPERATION_FAILED:
- DEBUG("controller initialization failed");
+ LOG_DEBUG("controller initialization failed");
return ERROR_NAND_OPERATION_FAILED;
case ERROR_NAND_OPERATION_NOT_SUPPORTED:
- ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
+ LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
device->bus_width, device->address_cycles, device->page_size);
return ERROR_NAND_OPERATION_FAILED;
default:
- ERROR("BUG: unknown controller initialization failure");
+ LOG_ERROR("BUG: unknown controller initialization failure");
return ERROR_NAND_OPERATION_FAILED;
}
}
/* Send erase confirm command */
device->controller->command(device, NAND_CMD_ERASE2);
-
- if (!device->controller->nand_ready(device, 1000))
- {
- ERROR("timeout waiting for NAND flash block erase to complete");
+
+ retval = device->controller->nand_ready ?
+ device->controller->nand_ready(device, 1000) :
+ nand_poll_ready(device, 1000);
+ if (!retval) {
+ LOG_ERROR("timeout waiting for NAND flash block erase to complete");
return ERROR_NAND_OPERATION_TIMEOUT;
}
if ((retval = nand_read_status(device, &status)) != ERROR_OK)
{
- ERROR("couldn't read status");
+ LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
if (status & 0x1)
{
- ERROR("erase operation didn't pass, status: 0x%2.2x", status);
+ LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status);
return ERROR_NAND_OPERATION_FAILED;
}
+
+ device->blocks[i].is_erased = 1;
}
return ERROR_OK;
}
-int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
+#if 0
+static int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
{
u8 *page;
if (address % device->page_size)
{
- ERROR("reads need to be page aligned");
+ LOG_ERROR("reads need to be page aligned");
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
-int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
+static int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
{
u8 *page;
if (address % device->page_size)
{
- ERROR("writes need to be page aligned");
+ LOG_ERROR("writes need to be page aligned");
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
+#endif
int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
{
+ u32 block;
+
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
+ block = page / (device->erase_size / device->page_size);
+ if (device->blocks[block].is_erased == 1)
+ device->blocks[block].is_erased = 0;
+
if (device->use_raw || device->controller->write_page == NULL)
return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
else
return device->controller->write_page(device, page, data, data_size, oob, oob_size);
}
-int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+static int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
{
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
{
- int i;
+ u32 i;
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
* or 2048 for the beginning of OOB area)
*/
device->controller->address(device, 0x0);
- device->controller->address(device, 0x8);
+ if (data)
+ device->controller->address(device, 0x0);
+ else
+ device->controller->address(device, 0x8);
/* row */
device->controller->address(device, page & 0xff);
device->controller->command(device, NAND_CMD_READSTART);
}
- if (!device->controller->nand_ready(device, 100))
- return ERROR_NAND_OPERATION_TIMEOUT;
+ if (device->controller->nand_ready) {
+ if (!device->controller->nand_ready(device, 100))
+ return ERROR_NAND_OPERATION_TIMEOUT;
+ } else {
+ alive_sleep(1);
+ }
if (data)
{
int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
{
- int i;
+ u32 i;
int retval;
u8 status;
* or 2048 for the beginning of OOB area)
*/
device->controller->address(device, 0x0);
- device->controller->address(device, 0x8);
+ if (data)
+ device->controller->address(device, 0x0);
+ else
+ device->controller->address(device, 0x8);
/* row */
device->controller->address(device, page & 0xff);
device->controller->command(device, NAND_CMD_PAGEPROG);
- if (!device->controller->nand_ready(device, 100))
+ retval = device->controller->nand_ready ?
+ device->controller->nand_ready(device, 100) :
+ nand_poll_ready(device, 100);
+ if (!retval)
return ERROR_NAND_OPERATION_TIMEOUT;
if ((retval = nand_read_status(device, &status)) != ERROR_OK)
{
- ERROR("couldn't read status");
+ LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
if (status & NAND_STATUS_FAIL)
{
- ERROR("write operation didn't pass, status: 0x%2.2x", status);
+ LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
-int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
int i = 0;
return ERROR_OK;
}
-int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
int retval;
return ERROR_OK;
}
-int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
int retval;
return ERROR_OK;
}
-int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
return ERROR_OK;
}
-int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
u32 offset;
u32 binary_size;
u32 page_size = 0;
u8 *oob = NULL;
u32 oob_size = 0;
+ const int *eccpos = NULL;
- duration_start_measure(&duration);
offset = strtoul(args[2], NULL, 0);
if (argc > 3)
oob_format |= NAND_OOB_RAW;
else if (!strcmp(args[i], "oob_only"))
oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
+ else if (!strcmp(args[i], "oob_softecc"))
+ oob_format |= NAND_OOB_SW_ECC;
else
{
command_print(cmd_ctx, "unknown option: %s", args[i]);
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
}
}
+ duration_start_measure(&duration);
+
if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
{
return ERROR_OK;
page = malloc(p->page_size);
}
- if (oob_format & NAND_OOB_RAW)
+ if (oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC))
{
- if (p->page_size == 512)
+ if (p->page_size == 512) {
oob_size = 16;
- else if (p->page_size == 2048)
+ eccpos = nand_oob_16.eccpos;
+ } else if (p->page_size == 2048) {
oob_size = 64;
+ eccpos = nand_oob_64.eccpos;
+ }
oob = malloc(oob_size);
}
if (offset % p->page_size)
{
command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
+ fileio_close(&fileio);
+ free(oob);
+ free(page);
return ERROR_OK;
}
{
u32 size_read;
- if (page)
+ if (NULL != page)
{
fileio_read(&fileio, page_size, page, &size_read);
buf_cnt -= size_read;
memset(page + size_read, 0xff, page_size - size_read);
}
}
-
- if (oob)
+
+ if (oob_format & NAND_OOB_SW_ECC)
+ {
+ u32 i, j;
+ u8 ecc[3];
+ memset(oob, 0xff, oob_size);
+ for (i = 0, j = 0; i < page_size; i += 256) {
+ nand_calculate_ecc(p, page+i, ecc);
+ oob[eccpos[j++]] = ecc[0];
+ oob[eccpos[j++]] = ecc[1];
+ oob[eccpos[j++]] = ecc[2];
+ }
+ }
+ else if (NULL != oob)
{
fileio_read(&fileio, oob_size, oob, &size_read);
buf_cnt -= size_read;
{
command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
args[1], args[0], offset);
+
+ fileio_close(&fileio);
+ free(oob);
+ free(page);
+
return ERROR_OK;
}
offset += page_size;
}
fileio_close(&fileio);
-
+ free(oob);
+ free(page);
+ oob = NULL;
+ page = NULL;
duration_stop_measure(&duration, &duration_text);
- command_print(cmd_ctx, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
+ command_print(cmd_ctx, "wrote file %s to NAND flash %s up to offset 0x%8.8x in %s",
args[1], args[0], offset, duration_text);
free(duration_text);
+ duration_text = NULL;
}
else
{
return ERROR_OK;
}
-int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
{
command_print(cmd_ctx, "reading NAND flash page failed");
+ free(page);
+ free(oob);
+ fileio_close(&fileio);
return ERROR_OK;
}
- if (page)
+ if (NULL != page)
{
fileio_write(&fileio, page_size, page, &size_written);
bytes_done += page_size;
}
- if (oob)
+ if (NULL != oob)
{
fileio_write(&fileio, oob_size, oob, &size_written);
bytes_done += oob_size;
address += p->page_size;
}
- if (page)
- free(page);
-
- if (oob)
- free(oob);
-
+ free(page);
+ page = NULL;
+ free(oob);
+ oob = NULL;
fileio_close(&fileio);
duration_stop_measure(&duration, &duration_text);
command_print(cmd_ctx, "dumped %"PRIi64" byte in %s", fileio.size, duration_text);
free(duration_text);
+ duration_text = NULL;
}
else
{
return ERROR_OK;
}
-int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
return ERROR_OK;
}
-
Code Review / openocd.git / blobdiff