#include "flash.h"
#include "target.h"
+#define CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7 0xE0 /* DQ5..DQ7 */
+#define CFI_STATUS_POLL_MASK_DQ6_DQ7 0xC0 /* DQ6..DQ7 */
+
typedef struct cfi_flash_bank_s
{
- struct target_s *target;
working_area_t *write_algorithm;
- working_area_t *erase_check_algorithm;
-
+
+ int x16_as_x8;
+ int jedec_probe;
+ int not_cfi;
+ int probed;
+
+ u16 manufacturer;
+ u16 device_id;
+
char qry[3];
-
+
/* identification string */
u16 pri_id;
u16 pri_addr;
u16 alt_id;
u16 alt_addr;
-
+
/* device-system interface */
u8 vcc_min;
u8 vcc_max;
u8 buf_write_timeout_max;
u8 block_erase_timeout_max;
u8 chip_erase_timeout_max;
-
+
+ u8 status_poll_mask;
+
/* flash geometry */
- u8 dev_size;
+ u32 dev_size;
u16 interface_desc;
u16 max_buf_write_size;
u8 num_erase_regions;
u32 *erase_region_info;
-
+
void *pri_ext;
void *alt_ext;
} cfi_flash_bank_t;
-/* Intel primary extended query table
+/* Intel primary extended query table
* as defined for the Advanced+ Boot Block Flash Memory (C3)
* and used by the linux kernel cfi driver (as of 2.6.14)
*/
u8 extra[0];
} cfi_intel_pri_ext_t;
+/* Spansion primary extended query table as defined for and used by
+ * the linux kernel cfi driver (as of 2.6.15)
+ */
+typedef struct cfi_spansion_pri_ext_s
+{
+ u8 pri[3];
+ u8 major_version;
+ u8 minor_version;
+ u8 SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
+ u8 EraseSuspend;
+ u8 BlkProt;
+ u8 TmpBlkUnprotect;
+ u8 BlkProtUnprot;
+ u8 SimultaneousOps;
+ u8 BurstMode;
+ u8 PageMode;
+ u8 VppMin;
+ u8 VppMax;
+ u8 TopBottom;
+ int _reversed_geometry;
+ u32 _unlock1;
+ u32 _unlock2;
+} cfi_spansion_pri_ext_t;
+
+/* Atmel primary extended query table as defined for and used by
+ * the linux kernel cfi driver (as of 2.6.20+)
+ */
+typedef struct cfi_atmel_pri_ext_s
+{
+ u8 pri[3];
+ u8 major_version;
+ u8 minor_version;
+ u8 features;
+ u8 bottom_boot;
+ u8 burst_mode;
+ u8 page_mode;
+} cfi_atmel_pri_ext_t;
+
+enum {
+ CFI_UNLOCK_555_2AA,
+ CFI_UNLOCK_5555_2AAA,
+};
+
+typedef struct cfi_unlock_addresses_s
+{
+ u32 unlock1;
+ u32 unlock2;
+} cfi_unlock_addresses_t;
+
+typedef struct cfi_fixup_s
+{
+ u16 mfr;
+ u16 id;
+ void (*fixup)(flash_bank_t *flash, void *param);
+ void *param;
+} cfi_fixup_t;
+
+#define CFI_MFR_AMD 0x0001
+#define CFI_MFR_FUJITSU 0x0004
+#define CFI_MFR_ATMEL 0x001F
+#define CFI_MFR_ST 0x0020 /* STMicroelectronics */
+#define CFI_MFR_AMIC 0x0037
+#define CFI_MFR_SST 0x00BF
+#define CFI_MFR_MX 0x00C2
+
+#define CFI_MFR_ANY 0xffff
+#define CFI_ID_ANY 0xffff
+
#endif /* CFI_H */