/* inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset) */
static __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
{
+ cfi_flash_bank_t *cfi_info = bank->driver_priv;
+
+ if(cfi_info->x16_as_x8) offset*=2;
+
/* while the sector list isn't built, only accesses to sector 0 work */
if (sector == 0)
return bank->base + offset * bank->bus_width;
target_t *target = bank->target;
u8 data[CFI_MAX_BUS_WIDTH];
- target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data);
+ target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data);
if (bank->target->endianness == TARGET_LITTLE_ENDIAN)
return data[0];
u8 data[CFI_MAX_BUS_WIDTH];
int i;
- target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data);
+ target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data);
if (bank->target->endianness == TARGET_LITTLE_ENDIAN)
{
static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
+ cfi_flash_bank_t *cfi_info = bank->driver_priv;
u8 data[CFI_MAX_BUS_WIDTH * 2];
- target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 2, data);
+ if(cfi_info->x16_as_x8)
+ {
+ u8 i;
+ for(i=0;i<2;i++)
+ target_read_memory(target, flash_address(bank, sector, offset+i), bank->bus_width, 1,
+ &data[i*bank->bus_width] );
+ }
+ else
+ target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 2, data);
if (bank->target->endianness == TARGET_LITTLE_ENDIAN)
return data[0] | data[bank->bus_width] << 8;
static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
+ cfi_flash_bank_t *cfi_info = bank->driver_priv;
u8 data[CFI_MAX_BUS_WIDTH * 4];
- target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 4, data);
+ if(cfi_info->x16_as_x8)
+ {
+ u8 i;
+ for(i=0;i<4;i++)
+ target_read_memory(target, flash_address(bank, sector, offset+i), bank->bus_width, 1,
+ &data[i*bank->bus_width] );
+ }
+ else
+ target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 4, data);
if (bank->target->endianness == TARGET_LITTLE_ENDIAN)
return data[0] | data[bank->bus_width] << 8 | data[bank->bus_width * 2] << 16 | data[bank->bus_width * 3] << 24;
for (i = 0; i < align; ++i, ++copy_p)
{
u8 byte;
- if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
+ if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
}
for (; (count == 0) && (i < bank->bus_width); ++i, ++copy_p)
{
u8 byte;
- if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
+ if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
}
for (; i < bank->bus_width; ++i, ++copy_p)
{
u8 byte;
- if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
+ if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
}
if (bank->chip_width == 1)
{
u8 manufacturer, device_id;
- if((retval = target_read_u8(target, bank->base + 0x0, &manufacturer)) != ERROR_OK)
+ if((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK)
{
return retval;
}
- if((retval = target_read_u8(target, bank->base + 0x1, &device_id)) != ERROR_OK)
+ if((retval = target_read_u8(target, flash_address(bank, 0, 0x01), &device_id)) != ERROR_OK)
{
return retval;
}
}
else if (bank->chip_width == 2)
{
- if((retval = target_read_u16(target, bank->base + 0x0, &cfi_info->manufacturer)) != ERROR_OK)
+ if((retval = target_read_u16(target, flash_address(bank, 0, 0x00), &cfi_info->manufacturer)) != ERROR_OK)
{
return retval;
}
- if((retval = target_read_u16(target, bank->base + 0x2, &cfi_info->device_id)) != ERROR_OK)
+ if((retval = target_read_u16(target, flash_address(bank, 0, 0x02), &cfi_info->device_id)) != ERROR_OK)
{
return retval;
}