#include <string.h>
#include <unistd.h>
-int at91sam7_register_commands(struct command_context_s *cmd_ctx);
-int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int at91sam7_erase(struct flash_bank_s *bank, int first, int last);
-int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last);
-int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int at91sam7_probe(struct flash_bank_s *bank);
-int at91sam7_auto_probe(struct flash_bank_s *bank);
-int at91sam7_erase_check(struct flash_bank_s *bank);
-int at91sam7_protect_check(struct flash_bank_s *bank);
-int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-u32 at91sam7_get_flash_status(target_t *target, int bank_number);
-void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
-u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
-int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen);
-int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int at91sam7_register_commands(struct command_context_s *cmd_ctx);
+static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int at91sam7_erase(struct flash_bank_s *bank, int first, int last);
+static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int at91sam7_probe(struct flash_bank_s *bank);
+//static int at91sam7_auto_probe(struct flash_bank_s *bank);
+static int at91sam7_erase_check(struct flash_bank_s *bank);
+static int at91sam7_protect_check(struct flash_bank_s *bank);
+static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+static u32 at91sam7_get_flash_status(target_t *target, int bank_number);
+static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
+static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
+static int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen);
+static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t at91sam7_flash =
{
.info = at91sam7_info
};
-u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
-u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
-u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
+static u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
+static u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
+static u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
-char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
+static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
-long SRAMSIZ[16] = {
+#if 0
+static long SRAMSIZ[16] = {
-1,
0x0400, /* 1K */
0x0800, /* 2K */
0x18000, /* 96K */
0x80000, /* 512K */
};
+#endif
-int at91sam7_register_commands(struct command_context_s *cmd_ctx)
+static int at91sam7_register_commands(struct command_context_s *cmd_ctx)
{
command_t *at91sam7_cmd = register_command(cmd_ctx, NULL, "at91sam7_new", NULL, COMMAND_ANY, NULL);
return ERROR_OK;
}
-u32 at91sam7_get_flash_status(target_t *target, int bank_number)
+static u32 at91sam7_get_flash_status(target_t *target, int bank_number)
{
u32 fsr;
target_read_u32(target, MC_FSR[bank_number], &fsr);
}
/* Read clock configuration and set at91sam7_info->mck_freq */
-void at91sam7_read_clock_info(flash_bank_t *bank)
+static void at91sam7_read_clock_info(flash_bank_t *bank)
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
}
/* Setup the timimg registers for nvbits or normal flash */
-void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
+static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
{
u32 fmr, fmcn = 0, fws = 0;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
at91sam7_info->flashmode = mode;
}
-u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
+static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
{
u32 status;
}
/* Send one command to the AT91SAM flash controller */
-int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen)
+static int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen)
{
u32 fcr;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
}
/* Read device id register, main clock frequency register and fill in driver info structure */
-int at91sam7_read_part_info(struct flash_bank_s *bank)
+static int at91sam7_read_part_info(struct flash_bank_s *bank)
{
flash_bank_t *t_bank = bank;
at91sam7_flash_bank_t *at91sam7_info;
u16 bnk, sec;
u16 arch;
u32 cidr;
- u8 banks_num;
- u16 num_nvmbits;
- u16 sectors_num;
- u16 pages_per_sector;
- u16 page_size;
+ u8 banks_num = 0;
+ u16 num_nvmbits = 0;
+ u16 sectors_num = 0;
+ u16 pages_per_sector = 0;
+ u16 page_size = 0;
u32 ext_freq;
u32 bank_size;
u32 base_address = 0;
return ERROR_OK;
}
-int at91sam7_erase_check(struct flash_bank_s *bank)
+static int at91sam7_erase_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
u16 retval;
return ERROR_OK;
}
-int at91sam7_protect_check(struct flash_bank_s *bank)
+static int at91sam7_protect_check(struct flash_bank_s *bank)
{
u8 lock_pos, gpnvm_pos;
u32 status;
# flash bank at91sam7 0x00100000 0 0 4 0 0 AT91SAM7XC256 1 16 64 256 3 0 ==== NOT RECOMENDED !!! ====
# flash bank at91sam7 0 0 0 0 0 (old style, full auto-detection) ==== NOT RECOMENDED !!! ====
****************************************************************************************************************************************************************************************/
-int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
flash_bank_t *t_bank = bank;
at91sam7_flash_bank_t *at91sam7_info;
return ERROR_OK;
}
-int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
+static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
int sec;
return ERROR_OK;
}
-int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
{
u32 cmd;
- u32 sector, pagen;
+ int sector;
+ u32 pagen;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
return ERROR_OK;
}
-int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
+ int retval;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
u32 dst_min_alignment, wcount, bytes_remaining = count;
/* Write one block to the PageWriteBuffer */
buffer_pos = (pagen-first_page)*dst_min_alignment;
wcount = CEIL(count,4);
- target->type->write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos);
+ if((retval = target->type->write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK)
+ {
+ return retval;
+ }
/* Send Write Page command to Flash Controller */
if (at91sam7_flash_command(bank, WP, pagen) != ERROR_OK)
return ERROR_OK;
}
-int at91sam7_probe(struct flash_bank_s *bank)
+static int at91sam7_probe(struct flash_bank_s *bank)
{
/* we can't probe on an at91sam7
* if this is an at91sam7, it has the configured flash */
return ERROR_OK;
}
-int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
buf_size -= printed;
printed = snprintf(buf, buf_size,
- " Master clock (estimated): %li KHz | External clock: %li KHz\n",
+ " Master clock (estimated): %u KHz | External clock: %u KHz\n",
at91sam7_info->mck_freq / 1000, at91sam7_info->ext_freq / 1000);
buf += printed;
* The maximum number of write/erase cycles for Non volatile Memory bits is 100. this includes
* Lock Bits (LOCKx), General Purpose NVM bits (GPNVMx) and the Security Bit.
*/
-int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
int bit;