The OpenOCD web site provides the latest public news from the community:
-@uref{http://openocd.sourceforge.net/}
+@uref{http://openocd.org/}
@section Latest User's Guide:
available. A version for more recent code may be available.
Its HTML form is published regularly at:
-@uref{http://openocd.sourceforge.net/doc/html/index.html}
+@uref{http://openocd.org/doc/html/index.html}
PDF form is likewise published at:
-@uref{http://openocd.sourceforge.net/doc/pdf/openocd.pdf}
+@uref{http://openocd.org/doc/pdf/openocd.pdf}
@section OpenOCD User's Forum
technical information about the software internals, development
processes, and similar documentation:
-@uref{http://openocd.sourceforge.net/doc/doxygen/html/index.html}
+@uref{http://openocd.org/doc/doxygen/html/index.html}
This document is a work-in-progress, but contributions would be welcome
to fill in the gaps. All of the source files are provided in-tree,
The OpenOCD Bug Tracker is hosted on SourceForge:
-@uref{https://sourceforge.net/p/openocd/tickets/}
+@uref{http://bugs.openocd.org/}
@node Debug Adapter Hardware
@example
Open On-Chip Debugger 0.4.0 (2010-01-14-15:06)
For bug reports, read
- http://openocd.sourceforge.net/doc/doxygen/bugs.html
+ http://openocd.org/doc/doxygen/bugs.html
Info : JTAG tap: lm3s.cpu tap/device found: 0x3ba00477
(mfg: 0x23b, part: 0xba00, ver: 0x3)
@end example
needs to get a new board working smoothly.
It provides guidelines for creating those files.
-You should find the following directories under @t{$(INSTALLDIR)/scripts},
-with files including the ones listed here.
-Use them as-is where you can; or as models for new files.
+You should find the following directories under
+@t{$(INSTALLDIR)/scripts}, with config files maintained upstream. Use
+them as-is where you can; or as models for new files.
@itemize @bullet
@item @file{interface} ...
-These are for debug adapters.
-Files that configure JTAG adapters go here.
-@example
-$ ls interface -R
-interface/:
-altera-usb-blaster.cfg hilscher_nxhx50_re.cfg openocd-usb-hs.cfg
-arm-jtag-ew.cfg hitex_str9-comstick.cfg openrd.cfg
-at91rm9200.cfg icebear.cfg osbdm.cfg
-axm0432.cfg jlink.cfg parport.cfg
-busblaster.cfg jtagkey2.cfg parport_dlc5.cfg
-buspirate.cfg jtagkey2p.cfg redbee-econotag.cfg
-calao-usb-a9260-c01.cfg jtagkey.cfg redbee-usb.cfg
-calao-usb-a9260-c02.cfg jtagkey-tiny.cfg rlink.cfg
-calao-usb-a9260.cfg jtag-lock-pick_tiny_2.cfg sheevaplug.cfg
-chameleon.cfg kt-link.cfg signalyzer.cfg
-cortino.cfg lisa-l.cfg signalyzer-h2.cfg
-digilent-hs1.cfg luminary.cfg signalyzer-h4.cfg
-dlp-usb1232h.cfg luminary-icdi.cfg signalyzer-lite.cfg
-dummy.cfg luminary-lm3s811.cfg stlink-v1.cfg
-estick.cfg minimodule.cfg stlink-v2.cfg
-flashlink.cfg neodb.cfg stm32-stick.cfg
-flossjtag.cfg ngxtech.cfg sysfsgpio-raspberrypi.cfg
-flossjtag-noeeprom.cfg olimex-arm-usb-ocd.cfg ti-icdi.cfg
-flyswatter2.cfg olimex-arm-usb-ocd-h.cfg turtelizer2.cfg
-flyswatter.cfg olimex-arm-usb-tiny-h.cfg ulink.cfg
-ftdi olimex-jtag-tiny.cfg usb-jtag.cfg
-hilscher_nxhx10_etm.cfg oocdlink.cfg usbprog.cfg
-hilscher_nxhx500_etm.cfg opendous.cfg vpaclink.cfg
-hilscher_nxhx500_re.cfg opendous_ftdi.cfg vsllink.cfg
-hilscher_nxhx50_etm.cfg openocd-usb.cfg xds100v2.cfg
-
-interface/ftdi:
-axm0432.cfg hitex_str9-comstick.cfg olimex-jtag-tiny.cfg
-calao-usb-a9260-c01.cfg icebear.cfg oocdlink.cfg
-calao-usb-a9260-c02.cfg jtagkey2.cfg opendous_ftdi.cfg
-cortino.cfg jtagkey2p.cfg openocd-usb.cfg
-dlp-usb1232h.cfg jtagkey.cfg openocd-usb-hs.cfg
-dp_busblaster.cfg jtag-lock-pick_tiny_2.cfg openrd.cfg
-flossjtag.cfg kt-link.cfg redbee-econotag.cfg
-flossjtag-noeeprom.cfg lisa-l.cfg redbee-usb.cfg
-flyswatter2.cfg luminary.cfg sheevaplug.cfg
-flyswatter.cfg luminary-icdi.cfg signalyzer.cfg
-gw16042.cfg luminary-lm3s811.cfg signalyzer-lite.cfg
-hilscher_nxhx10_etm.cfg minimodule.cfg stm32-stick.cfg
-hilscher_nxhx500_etm.cfg neodb.cfg turtelizer2-revB.cfg
-hilscher_nxhx500_re.cfg ngxtech.cfg turtelizer2-revC.cfg
-hilscher_nxhx50_etm.cfg olimex-arm-usb-ocd.cfg vpaclink.cfg
-hilscher_nxhx50_re.cfg olimex-arm-usb-ocd-h.cfg xds100v2.cfg
-hitex_lpc1768stick.cfg olimex-arm-usb-tiny-h.cfg
-$
-@end example
+These are for debug adapters. Files that specify configuration to use
+specific JTAG, SWD and other adapters go here.
@item @file{board} ...
-think Circuit Board, PWA, PCB, they go by many names. Board files
+Think Circuit Board, PWA, PCB, they go by many names. Board files
contain initialization items that are specific to a board.
+
They reuse target configuration files, since the same
microprocessor chips are used on many boards,
but support for external parts varies widely. For
sequence to enable that external flash or SDRAM should be found in the
board file. Boards may also contain multiple targets: two CPUs; or
a CPU and an FPGA.
-@example
-$ ls board
-actux3.cfg lpc1850_spifi_generic.cfg
-am3517evm.cfg lpc4350_spifi_generic.cfg
-arm_evaluator7t.cfg lubbock.cfg
-at91cap7a-stk-sdram.cfg mcb1700.cfg
-at91eb40a.cfg microchip_explorer16.cfg
-at91rm9200-dk.cfg mini2440.cfg
-at91rm9200-ek.cfg mini6410.cfg
-at91sam9261-ek.cfg netgear-dg834v3.cfg
-at91sam9263-ek.cfg olimex_LPC2378STK.cfg
-at91sam9g20-ek.cfg olimex_lpc_h2148.cfg
-atmel_at91sam7s-ek.cfg olimex_sam7_ex256.cfg
-atmel_at91sam9260-ek.cfg olimex_sam9_l9260.cfg
-atmel_at91sam9rl-ek.cfg olimex_stm32_h103.cfg
-atmel_sam3n_ek.cfg olimex_stm32_h107.cfg
-atmel_sam3s_ek.cfg olimex_stm32_p107.cfg
-atmel_sam3u_ek.cfg omap2420_h4.cfg
-atmel_sam3x_ek.cfg open-bldc.cfg
-atmel_sam4s_ek.cfg openrd.cfg
-balloon3-cpu.cfg osk5912.cfg
-colibri.cfg phone_se_j100i.cfg
-crossbow_tech_imote2.cfg phytec_lpc3250.cfg
-csb337.cfg pic-p32mx.cfg
-csb732.cfg propox_mmnet1001.cfg
-da850evm.cfg pxa255_sst.cfg
-digi_connectcore_wi-9c.cfg redbee.cfg
-diolan_lpc4350-db1.cfg rsc-w910.cfg
-dm355evm.cfg sheevaplug.cfg
-dm365evm.cfg smdk6410.cfg
-dm6446evm.cfg spear300evb.cfg
-efikamx.cfg spear300evb_mod.cfg
-eir.cfg spear310evb20.cfg
-ek-lm3s1968.cfg spear310evb20_mod.cfg
-ek-lm3s3748.cfg spear320cpu.cfg
-ek-lm3s6965.cfg spear320cpu_mod.cfg
-ek-lm3s811.cfg steval_pcc010.cfg
-ek-lm3s811-revb.cfg stm320518_eval_stlink.cfg
-ek-lm3s8962.cfg stm32100b_eval.cfg
-ek-lm3s9b9x.cfg stm3210b_eval.cfg
-ek-lm3s9d92.cfg stm3210c_eval.cfg
-ek-lm4f120xl.cfg stm3210e_eval.cfg
-ek-lm4f232.cfg stm3220g_eval.cfg
-embedded-artists_lpc2478-32.cfg stm3220g_eval_stlink.cfg
-ethernut3.cfg stm3241g_eval.cfg
-glyn_tonga2.cfg stm3241g_eval_stlink.cfg
-hammer.cfg stm32f0discovery.cfg
-hilscher_nxdb500sys.cfg stm32f3discovery.cfg
-hilscher_nxeb500hmi.cfg stm32f4discovery.cfg
-hilscher_nxhx10.cfg stm32ldiscovery.cfg
-hilscher_nxhx500.cfg stm32vldiscovery.cfg
-hilscher_nxhx50.cfg str910-eval.cfg
-hilscher_nxsb100.cfg telo.cfg
-hitex_lpc1768stick.cfg ti_am335xevm.cfg
-hitex_lpc2929.cfg ti_beagleboard.cfg
-hitex_stm32-performancestick.cfg ti_beagleboard_xm.cfg
-hitex_str9-comstick.cfg ti_beaglebone.cfg
-iar_lpc1768.cfg ti_blaze.cfg
-iar_str912_sk.cfg ti_pandaboard.cfg
-icnova_imx53_sodimm.cfg ti_pandaboard_es.cfg
-icnova_sam9g45_sodimm.cfg topas910.cfg
-imx27ads.cfg topasa900.cfg
-imx27lnst.cfg twr-k60f120m.cfg
-imx28evk.cfg twr-k60n512.cfg
-imx31pdk.cfg tx25_stk5.cfg
-imx35pdk.cfg tx27_stk5.cfg
-imx53loco.cfg unknown_at91sam9260.cfg
-keil_mcb1700.cfg uptech_2410.cfg
-keil_mcb2140.cfg verdex.cfg
-kwikstik.cfg voipac.cfg
-linksys_nslu2.cfg voltcraft_dso-3062c.cfg
-lisa-l.cfg x300t.cfg
-logicpd_imx27.cfg zy1000.cfg
-$
-@end example
@item @file{target} ...
-think chip. The ``target'' directory represents the JTAG TAPs
+Think chip. The ``target'' directory represents the JTAG TAPs
on a chip
which OpenOCD should control, not a board. Two common types of targets
are ARM chips and FPGA or CPLD chips.
When a chip has multiple TAPs (maybe it has both ARM and DSP cores),
the target config file defines all of them.
-@example
-$ ls target
-aduc702x.cfg lpc1764.cfg
-am335x.cfg lpc1765.cfg
-amdm37x.cfg lpc1766.cfg
-ar71xx.cfg lpc1767.cfg
-at32ap7000.cfg lpc1768.cfg
-at91r40008.cfg lpc1769.cfg
-at91rm9200.cfg lpc1788.cfg
-at91sam3ax_4x.cfg lpc17xx.cfg
-at91sam3ax_8x.cfg lpc1850.cfg
-at91sam3ax_xx.cfg lpc2103.cfg
-at91sam3nXX.cfg lpc2124.cfg
-at91sam3sXX.cfg lpc2129.cfg
-at91sam3u1c.cfg lpc2148.cfg
-at91sam3u1e.cfg lpc2294.cfg
-at91sam3u2c.cfg lpc2378.cfg
-at91sam3u2e.cfg lpc2460.cfg
-at91sam3u4c.cfg lpc2478.cfg
-at91sam3u4e.cfg lpc2900.cfg
-at91sam3uxx.cfg lpc2xxx.cfg
-at91sam3XXX.cfg lpc3131.cfg
-at91sam4sd32x.cfg lpc3250.cfg
-at91sam4sXX.cfg lpc4350.cfg
-at91sam4XXX.cfg lpc4350.cfg.orig
-at91sam7se512.cfg mc13224v.cfg
-at91sam7sx.cfg nuc910.cfg
-at91sam7x256.cfg omap2420.cfg
-at91sam7x512.cfg omap3530.cfg
-at91sam9260.cfg omap4430.cfg
-at91sam9260_ext_RAM_ext_flash.cfg omap4460.cfg
-at91sam9261.cfg omap5912.cfg
-at91sam9263.cfg omapl138.cfg
-at91sam9.cfg pic32mx.cfg
-at91sam9g10.cfg pxa255.cfg
-at91sam9g20.cfg pxa270.cfg
-at91sam9g45.cfg pxa3xx.cfg
-at91sam9rl.cfg readme.txt
-atmega128.cfg samsung_s3c2410.cfg
-avr32.cfg samsung_s3c2440.cfg
-c100.cfg samsung_s3c2450.cfg
-c100config.tcl samsung_s3c4510.cfg
-c100helper.tcl samsung_s3c6410.cfg
-c100regs.tcl sharp_lh79532.cfg
-cs351x.cfg sim3x.cfg
-davinci.cfg smp8634.cfg
-dragonite.cfg spear3xx.cfg
-dsp56321.cfg stellaris.cfg
-dsp568013.cfg stellaris_icdi.cfg
-dsp568037.cfg stm32f0x_stlink.cfg
-efm32_stlink.cfg stm32f1x.cfg
-epc9301.cfg stm32f1x_stlink.cfg
-faux.cfg stm32f2x.cfg
-feroceon.cfg stm32f2x_stlink.cfg
-fm3.cfg stm32f3x.cfg
-hilscher_netx10.cfg stm32f3x_stlink.cfg
-hilscher_netx500.cfg stm32f4x.cfg
-hilscher_netx50.cfg stm32f4x_stlink.cfg
-icepick.cfg stm32l.cfg
-imx21.cfg stm32lx_dual_bank.cfg
-imx25.cfg stm32lx_stlink.cfg
-imx27.cfg stm32_stlink.cfg
-imx28.cfg stm32w108_stlink.cfg
-imx31.cfg stm32xl.cfg
-imx35.cfg str710.cfg
-imx51.cfg str730.cfg
-imx53.cfg str750.cfg
-imx6.cfg str912.cfg
-imx.cfg swj-dp.tcl
-is5114.cfg test_reset_syntax_error.cfg
-ixp42x.cfg test_syntax_error.cfg
-k40.cfg ti-ar7.cfg
-k60.cfg ti_calypso.cfg
-lpc1751.cfg ti_dm355.cfg
-lpc1752.cfg ti_dm365.cfg
-lpc1754.cfg ti_dm6446.cfg
-lpc1756.cfg tmpa900.cfg
-lpc1758.cfg tmpa910.cfg
-lpc1759.cfg u8500.cfg
-lpc1763.cfg
-@end example
@item @emph{more} ... browse for other library files which may be useful.
For example, there are various generic and CPU-specific utilities.
@end itemize
@end quotation
@end deffn
+@anchor{hla_interface}
@deffn {Interface Driver} {hla}
This is a driver that supports multiple High Level Adapters.
This type of adapter does not expose some of the lower level api's
Execute a custom adapter-specific command. The @var{command} string is
passed as is to the underlying adapter layout handler.
@end deffn
-
-@deffn {Config Command} {trace} source_clock_hz [output_file_path]
-Enable SWO tracing (if supported). The source clock rate for the
-trace port must be specified, this is typically the CPU clock rate. If
-the optional output file is specified then raw trace data is appended
-to the file, and the file is created if it does not exist.
-@end deffn
@end deffn
@deffn {Interface Driver} {opendous}
version of OpenOCD.
@end deffn
-@deffn Command {transport select} transport_name
+@deffn Command {transport select} @option{transport_name}
Select which of the supported transports to use in this OpenOCD session.
-The transport must be supported by the debug adapter hardware and by the
-version of OpenOCD you are using (including the adapter's driver).
-No arguments: returns name of session's selected transport.
+
+When invoked with @option{transport_name}, attempts to select the named
+transport. The transport must be supported by the debug adapter
+hardware and by the version of OpenOCD you are using (including the
+adapter's driver).
+
+If no transport has been selected and no @option{transport_name} is
+provided, @command{transport select} auto-selects the first transport
+supported by the debug adapter.
+
+@command{transport select} always returns the name of the session's selected
+transport, if any.
@end deffn
@subsection JTAG Transport
each of which must be explicitly declared.
JTAG supports both debugging and boundary scan testing.
Flash programming support is built on top of debug support.
+
+JTAG transport is selected with the command @command{transport select
+jtag}. Unless your adapter uses @ref{hla_interface,the hla interface
+driver}, in which case the command is @command{transport select
+hla_jtag}.
+
@subsection SWD Transport
@cindex SWD
@cindex Serial Wire Debug
SWD is debug-oriented, and does not support boundary scan testing.
Flash programming support is built on top of debug support.
(Some processors support both JTAG and SWD.)
+
+SWD transport is selected with the command @command{transport select
+swd}. Unless your adapter uses @ref{hla_interface,the hla interface
+driver}, in which case the command is @command{transport select
+hla_swd}.
+
@deffn Command {swd newdap} ...
Declares a single DAP which uses SWD transport.
Parameters are currently the same as "jtag newtap" but this is
No parameters: displays current settings.
@end deffn
-@subsection CMSIS-DAP Transport
-@cindex CMSIS-DAP
-CMSIS-DAP is an ARM-specific transport that is used to connect to
-compilant debuggers.
-
@subsection SPI Transport
@cindex SPI
@cindex Serial Peripheral Interface
Several commands let you examine the list of targets:
-@deffn Command {target count}
-@emph{Note: target numbers are deprecated; don't use them.
-They will be removed shortly after August 2010, including this command.
-Iterate target using @command{target names}, not by counting.}
-
-Returns the number of targets, @math{N}.
-The highest numbered target is @math{N - 1}.
-@example
-set c [target count]
-for @{ set x 0 @} @{ $x < $c @} @{ incr x @} @{
- # Assuming you have created this function
- print_target_details $x
-@}
-@end example
-@end deffn
-
@deffn Command {target current}
Returns the name of the current target.
@end deffn
@end example
@end deffn
-@deffn Command {target number} number
-@emph{Note: target numbers are deprecated; don't use them.
-They will be removed shortly after August 2010, including this command.}
-
-The list of targets is numbered starting at zero.
-This command returns the name of the target at index @var{number}.
-@example
-set thename [target number $x]
-puts [format "Target %d is: %s\n" $x $thename]
-@end example
-@end deffn
-
@c yep, "target list" would have been better.
@c plus maybe "target setdefault".
@anchor{rtostype}
@item @code{-rtos} @var{rtos_type} -- enable rtos support for target,
@var{rtos_type} can be one of @option{auto}|@option{eCos}|@option{ThreadX}|
-@option{FreeRTOS}|@option{linux}|@option{ChibiOS}|@option{embKernel}
+@option{FreeRTOS}|@option{linux}|@option{ChibiOS}|@option{embKernel}|@option{mqx}
@xref{gdbrtossupport,,RTOS Support}.
@end itemize
@* After all targets have resumed
@item @b{resumed}
@* Target has resumed
+@item @b{trace-config}
+@* After target hardware trace configuration was changed
@end itemize
@node Flash Commands
@end deffn
@anchor{program}
-@deffn Command {program} filename [verify] [reset] [offset]
+@deffn Command {program} filename [verify] [reset] [exit] [offset]
This is a helper script that simplifies using OpenOCD as a standalone
programmer. The only required parameter is @option{filename}, the others are optional.
@xref{Flash Programming}.
This driver uses the same cmd names/syntax as @xref{at91sam3}.
@end deffn
+@deffn {Flash Driver} at91sam4l
+@cindex at91sam4l
+All members of the AT91SAM4L microcontroller family from
+Atmel include internal flash and use ARM's Cortex-M4 core.
+This driver uses the same cmd names/syntax as @xref{at91sam3}.
+
+The AT91SAM4L driver adds some additional commands:
+@deffn Command {at91sam4l smap_reset_deassert}
+This command releases internal reset held by SMAP
+and prepares reset vector catch in case of reset halt.
+Command is used internally in event event reset-deassert-post.
+@end deffn
+@end deffn
+
@deffn {Flash Driver} at91sam7
All members of the AT91SAM7 microcontroller family from Atmel include
internal flash and use ARM7TDMI cores. The driver automatically
@end deffn
@deffn {Flash Driver} lpc2000
-All members of the LPC11(x)00 and LPC1300 microcontroller families and most members
-of the LPC1700, LPC1800, LPC2000 and LPC4300 microcontroller families from NXP
-include internal flash and use Cortex-M0 (LPC11(x)00), Cortex-M3 (LPC1300, LPC1700,
-LPC1800), Cortex-M4 (LPC4300) or ARM7TDMI (LPC2000) cores.
+This is the driver to support internal flash of all members of the
+LPC11(x)00 and LPC1300 microcontroller families and most members of
+the LPC800, LPC1500, LPC1700, LPC1800, LPC2000, LPC4000 and LPC54100
+microcontroller families from NXP.
@quotation Note
There are LPC2000 devices which are not supported by the @var{lpc2000}
@item @var{variant} ... required, may be
@option{lpc2000_v1} (older LPC21xx and LPC22xx)
@option{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx)
-@option{lpc1700} (LPC175x and LPC176x)
+@option{lpc1700} (LPC175x and LPC176x and LPC177x/8x)
@option{lpc4300} - available also as @option{lpc1800} alias (LPC18x[2357] and
LPC43x[2357])
+@option{lpc800} (LPC8xx)
@option{lpc1100} (LPC11(x)xx and LPC13xx)
+@option{lpc1500} (LPC15xx)
+@option{lpc54100} (LPC541xx)
+@option{lpc4000} (LPC40xx)
or @option{auto} - automatically detects flash variant and size for LPC11(x)00,
-LPC1300 and LPC1700
+LPC8xx, LPC13xx, LPC17xx and LPC40xx
@item @var{clock_kHz} ... the frequency, in kiloHertz,
at which the core is running
@item @option{calc_checksum} ... optional (but you probably want to provide this!),
@end deffn
@deffn {Flash Driver} stellaris
-All members of the Stellaris LM3Sxxx microcontroller family from
-Texas Instruments
-include internal flash and use ARM Cortex M3 cores.
-The driver automatically recognizes a number of these chips using
-the chip identification register, and autoconfigures itself.
+All members of the Stellaris LM3Sxxx, LM4x and Tiva C microcontroller
+families from Texas Instruments include internal flash. The driver
+automatically recognizes a number of these chips using the chip
+identification register, and autoconfigures itself.
@footnote{Currently there is a @command{stellaris mass_erase} command.
That seems pointless since the same effect can be had using the
standard @command{flash erase_address} command.}
flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME
@end example
-@deffn Command {stellaris recover bank_id}
-Performs the @emph{Recovering a "Locked" Device} procedure to
-restore the flash specified by @var{bank_id} and its associated
-nonvolatile registers to their factory default values (erased).
-This is the only way to remove flash protection or re-enable
-debugging if that capability has been disabled.
+@deffn Command {stellaris recover}
+Performs the @emph{Recovering a "Locked" Device} procedure to restore
+the flash and its associated nonvolatile registers to their factory
+default values (erased). This is the only way to remove flash
+protection or re-enable debugging if that capability has been
+disabled.
Note that the final "power cycle the chip" step in this procedure
must be performed by hand, since OpenOCD can't do it.
works only for chips that do not have factory pre-programmed region 0
code.
@end deffn
+
+@end deffn
+
+@deffn {Flash Driver} mrvlqspi
+This driver supports QSPI flash controller of Marvell's Wireless
+Microcontroller platform.
+
+The flash size is autodetected based on the table of known JEDEC IDs
+hardcoded in the OpenOCD sources.
+
+@example
+flash bank $_FLASHNAME mrvlqspi 0x0 0 0 0 $_TARGETNAME 0x46010000
+@end example
+
+@end deffn
+
+@deffn {Flash Driver} mdr
+This drivers handles the integrated NOR flash on Milandr Cortex-M
+based controllers. A known limitation is that the Info memory can't be
+read or verified as it's not memory mapped.
+
+@example
+flash bank <name> mdr <base> <size> 0 0 <target#> @var{type} @var{page_count} @var{sec_count}
+@end example
+
+@itemize @bullet
+@item @var{type} - 0 for main memory, 1 for info memory
+@item @var{page_count} - total number of pages
+@item @var{sec_count} - number of sector per page count
+@end itemize
+
+Example usage:
+@example
+if @{ [info exists IMEMORY] && [string equal $IMEMORY true] @} @{
+ flash bank $@{_CHIPNAME@}_info.flash mdr 0x00000000 0x01000 0 0 $_TARGETNAME 1 1 4
+@} else @{
+ flash bank $_CHIPNAME.flash mdr 0x00000000 0x20000 0 0 $_TARGETNAME 0 32 4
+@}
+@end example
@end deffn
@section mFlash
or using the cmds given in @ref{flashprogrammingcommands,,Flash Programming Commands}.
@*To simplify using the flash cmds directly a jimtcl script is available that handles the programming and verify stage.
-OpenOCD will program/verify/reset the target and shutdown.
+OpenOCD will program/verify/reset the target and optionally shutdown.
The script is executed as follows and by default the following actions will be peformed.
@enumerate
@item @code{flash write_image} is called to erase and write any flash using the filename given.
@item @code{verify_image} is called if @option{verify} parameter is given.
@item @code{reset run} is called if @option{reset} parameter is given.
-@item OpenOCD is shutdown.
+@item OpenOCD is shutdown if @option{exit} parameter is given.
@end enumerate
An example of usage is given below. @xref{program}.
# program and verify using elf/hex/s19. verify and reset
# are optional parameters
openocd -f board/stm32f3discovery.cfg \
- -c "program filename.elf verify reset"
+ -c "program filename.elf verify reset exit"
# binary files need the flash address passing
openocd -f board/stm32f3discovery.cfg \
- -c "program filename.bin 0x08000000"
+ -c "program filename.bin exit 0x08000000"
@end example
@node NAND Flash Commands
(@command{script} command and @command{target_name} configuration).
@end deffn
-@deffn Command shutdown
-Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other).
+@deffn Command shutdown [@option{error}]
+Close the OpenOCD daemon, disconnecting all clients (GDB, telnet,
+other). If option @option{error} is used, OpenOCD will return a
+non-zero exit code to the parent process.
@end deffn
@anchor{debuglevel}
Defaulting to 0.
@end deffn
+@subsection ARMv7-M specific commands
+@cindex tracing
+@cindex SWO
+@cindex SWV
+@cindex TPIU
+@cindex ITM
+@cindex ETM
+
+@deffn Command {tpiu config} (@option{disable} | ((@option{external} | @option{internal @var{filename}}) @
+ (@option{sync @var{port_width}} | ((@option{manchester} | @option{uart}) @var{formatter_enable})) @
+ @var{TRACECLKIN_freq} [@var{trace_freq}]))
+
+ARMv7-M architecture provides several modules to generate debugging
+information internally (ITM, DWT and ETM). Their output is directed
+through TPIU to be captured externally either on an SWO pin (this
+configuration is called SWV) or on a synchronous parallel trace port.
+
+This command configures the TPIU module of the target and, if internal
+capture mode is selected, starts to capture trace output by using the
+debugger adapter features.
+
+Some targets require additional actions to be performed in the
+@b{trace-config} handler for trace port to be activated.
+
+Command options:
+@itemize @minus
+@item @option{disable} disable TPIU handling;
+@item @option{external} configure TPIU to let user capture trace
+output externally (with an additional UART or logic analyzer hardware);
+@item @option{internal @var{filename}} configure TPIU and debug adapter to
+gather trace data and append it to @var{filename} (which can be
+either a regular file or a named pipe);
+@item @option{sync @var{port_width}} use synchronous parallel trace output
+mode, and set port width to @var{port_width};
+@item @option{manchester} use asynchronous SWO mode with Manchester
+coding;
+@item @option{uart} use asynchronous SWO mode with NRZ (same as
+regular UART 8N1) coding;
+@item @var{formatter_enable} is @option{on} or @option{off} to enable
+or disable TPIU formatter which needs to be used when both ITM and ETM
+data is to be output via SWO;
+@item @var{TRACECLKIN_freq} this should be specified to match target's
+current TRACECLKIN frequency (usually the same as HCLK);
+@item @var{trace_freq} trace port frequency. Can be omitted in
+internal mode to let the adapter driver select the maximum supported
+rate automatically.
+@end itemize
+
+Example usage:
+@enumerate
+@item STM32L152 board is programmed with an application that configures
+PLL to provide core clock with 24MHz frequency; to use ITM output it's
+enough to:
+@example
+#include <libopencm3/cm3/itm.h>
+ ...
+ ITM_STIM8(0) = c;
+ ...
+@end example
+(the most obvious way is to use the first stimulus port for printf,
+for that this ITM_STIM8 assignment can be used inside _write(); to make it
+blocking to avoid data loss, add @code{while (!(ITM_STIM8(0) &
+ITM_STIM_FIFOREADY));});
+@item An FT2232H UART is connected to the SWO pin of the board;
+@item Commands to configure UART for 12MHz baud rate:
+@example
+$ setserial /dev/ttyUSB1 spd_cust divisor 5
+$ stty -F /dev/ttyUSB1 38400
+@end example
+(FT2232H's base frequency is 60MHz, spd_cust allows to alias 38400
+baud with our custom divisor to get 12MHz)
+@item @code{itmdump -f /dev/ttyUSB1 -d1}
+@item @code{openocd -f interface/stlink-v2-1.cfg -c "transport select
+hla_swd" -f target/stm32l1.cfg -c "tpiu config external uart off
+24000000 12000000"}
+@end enumerate
+@end deffn
+
+@deffn Command {itm port} @var{port} (@option{0}|@option{1}|@option{on}|@option{off})
+Enable or disable trace output for ITM stimulus @var{port} (counting
+from 0). Port 0 is enabled on target creation automatically.
+@end deffn
+
+@deffn Command {itm ports} (@option{0}|@option{1}|@option{on}|@option{off})
+Enable or disable trace output for all ITM stimulus ports.
+@end deffn
+
@subsection Cortex-M specific commands
@cindex Cortex-M
@item @option{linux}
@item @option{ChibiOS}
@item @option{embKernel}
+@item @option{mqx}
@end itemize
@quotation Note
@item FreeRTOS symbols
pxCurrentTCB, pxReadyTasksLists, xDelayedTaskList1, xDelayedTaskList2,
pxDelayedTaskList, pxOverflowDelayedTaskList, xPendingReadyList,
-xTasksWaitingTermination, xSuspendedTaskList, uxCurrentNumberOfTasks, uxTopUsedPriority.
+uxCurrentNumberOfTasks, uxTopUsedPriority.
@item linux symbols
init_task.
@item ChibiOS symbols
@item embKernel symbols
Rtos::sCurrentTask, Rtos::sListReady, Rtos::sListSleep,
Rtos::sListSuspended, Rtos::sMaxPriorities, Rtos::sCurrentTaskCount.
+@item mqx symbols
+_mqx_kernel_data, MQX_init_struct.
@end table
For most RTOS supported the above symbols will be exported by default. However for
-some, eg. FreeRTOS @option{xTasksWaitingTermination} is only exported
-if @option{INCLUDE_vTaskDelete} is defined during the build.
+some, eg. FreeRTOS, extra steps must be taken.
+
+These RTOSes may require additional OpenOCD-specific file to be linked
+along with the project:
+
+@table @code
+@item FreeRTOS
+contrib/rtos-helpers/FreeRTOS-openocd.c
+@end table
@node Tcl Scripting API
@chapter Tcl Scripting API
See @file{contrib/rpc_examples/} for specific client implementations.
+@section Tcl RPC server notifications
+@cindex RPC Notifications
+
+Notifications are sent asynchronously to other commands being executed over
+the RPC server, so the port must be polled continuously.
+
+Target event, state and reset notifications are emitted as Tcl associative arrays
+in the following format.
+
+@verbatim
+type target_event event [event-name]
+type target_state state [state-name]
+type target_reset mode [reset-mode]
+@end verbatim
+
+@deffn {Command} tcl_notifications [on/off]
+Toggle output of target notifications to the current Tcl RPC server.
+Only available from the Tcl RPC server.
+Defaults to off.
+
+@end deffn
+
@node FAQ
@chapter FAQ
@cindex faq
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