\input texinfo @c -*-texinfo-*-
@c %**start of header
@setfilename openocd.info
-@settitle Open On-Chip Debugger (openocd)
+@settitle Open On-Chip Debugger (OpenOCD)
+@dircategory Development
+@direntry
+* OpenOCD: (openocd). Open On-Chip Debugger.
+@end direntry
@c %**end of header
@include version.texi
+@copying
+Copyright @copyright{} 2007-2008 Spen @email{spen@@spen-soft.co.uk}@*
+Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
+@quotation
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts. A copy of the license is included in the section entitled ``GNU
+Free Documentation License''.
+@end quotation
+@end copying
+
@titlepage
-@title Open On-Chip Debugger (openocd)
-@subtitle Edition @value{EDITION} for openocd version @value{VERSION}
+@title Open On-Chip Debugger (OpenOCD)
+@subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
@subtitle @value{UPDATED}
@page
@vskip 0pt plus 1filll
+@insertcopying
@end titlepage
@contents
@node Top, About, , (dir)
@top OpenOCD
-This is edition @value{EDITION} of the openocd manual for version
-@value{VERSION}, @value{UPDATED}
+This manual documents edition @value{EDITION} of the Open On-Chip Debugger
+(OpenOCD) version @value{VERSION}, @value{UPDATED}.
+
+@insertcopying
@menu
-* About:: About Openocd.
-* Developers::
-* Building:: Building Openocd
-* Running:: Running Openocd
-* Configuration:: Openocd Configuration.
-* Commands:: Openocd Commands
+* About:: About OpenOCD.
+* Developers:: OpenOCD developers
+* Building:: Building OpenOCD
+* Running:: Running OpenOCD
+* Configuration:: OpenOCD Configuration.
+* Target library:: Target library
+* Commands:: OpenOCD Commands
* Sample Scripts:: Sample Target Scripts
+* TFTP:: TFTP
+* GDB and OpenOCD:: Using GDB and OpenOCD
+* TCL and OpenOCD:: Using TCL and OpenOCD
+* TCL scripting API:: Tcl scripting API
+* Upgrading:: Deprecated/Removed Commands
* FAQ:: Frequently Asked Questions
* License:: GNU Free Documentation License
* Index:: Main index.
@unnumbered About
@cindex about
-The Open On-Chip Debugger (openocd) aims to provide debugging, in-system programming
+The Open On-Chip Debugger (OpenOCD) aims to provide debugging, in-system programming
and boundary-scan testing for embedded target devices. The targets are interfaced
using JTAG (IEEE 1149.1) compliant hardware, but this may be extended to other
connection types in the future.
-Openocd currently supports Wiggler (clones), FTDI FT2232 based JTAG interfaces, the
+OpenOCD currently supports Wiggler (clones), FTDI FT2232 based JTAG interfaces, the
Amontec JTAG Accelerator, and the Gateworks GW1602. It allows ARM7 (ARM7TDMI and ARM720t),
ARM9 (ARM920t, ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be debugged.
@chapter Developers
@cindex developers
-Openocd has been created by Dominic Rath as part of a diploma thesis written at the
+OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
Others interested in improving the state of free and open debug and testing technology
are welcome to participate.
Other developers have contributed support for additional targets and flashes as well
as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
+The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}
+
@node Building
@chapter Building
-@cindex building openocd
+@cindex building OpenOCD
+
+If you are interested in getting actual work done rather than building
+OpenOCD, then check if your interface supplier provides binaries for
+you. Chances are that that binary is from some SVN version that is more
+stable than SVN trunk where bleeding edge development takes place.
+
You can download the current SVN version with SVN client of your choice from the
following repositories:
(@uref{http://svn.berlios.de/svnroot/repos/openocd/trunk})
-Using the SVN command line client, you could use the following command to fetch the
+Using the SVN command line client, you can use the following command to fetch the
latest version (make sure there is no (non-svn) directory called "openocd" in the
current directory):
@smallexample
- svn checkout svn://svn.berlios.de/openocd/trunk
+ svn checkout svn://svn.berlios.de/openocd/trunk openocd
@end smallexample
-Building the OpenOCD requires a recent version of the GNU autotools.
+Building OpenOCD requires a recent version of the GNU autotools.
On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows,
you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
homepage (@uref{www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
@end itemize
-Please note that the ftdi2232 variant (using libftdi) isn't supported under Cygwin.
-You have to use the ftd2xx variant (using FTDI's D2XX) on Cygwin.
+libftdi is supported under windows. Versions earlier than 0.13 will require patching.
+see contrib/libftdi for more details.
In general, the D2XX driver provides superior performance (several times as fast),
-but has the draw-back of being binary-only - though that isn't as worse, as it isn't
+but has the draw-back of being binary-only - though that isn't that bad, as it isn't
a kernel module, only a user space library.
To build OpenOCD (on both Linux and Cygwin), use the following commands:
@smallexample
./configure
@end smallexample
-Configure generates the Makefiles used to build OpenOCD
+Configure generates the Makefiles used to build OpenOCD.
@smallexample
make
@end smallexample
-Make builds the OpenOCD, and places the final executable in ./src/
+Make builds OpenOCD, and places the final executable in ./src/.
The configure script takes several options, specifying which JTAG interfaces
should be included:
@itemize @bullet
@item
---enable-parport
+@option{--enable-parport}
+@item
+@option{--enable-parport_ppdev}
@item
---enable-parport_ppdev
+@option{--enable-parport_giveio}
@item
---enable-amtjtagaccel
+@option{--enable-amtjtagaccel}
@item
---enable-ft2232_ftd2xx
+@option{--enable-ft2232_ftd2xx}
@footnote{Using the latest D2XX drivers from FTDI and following their installation
-instructions, I had to use @option{--enable-ft2232_libftd2xx} for the OpenOCD to
-build properly}
+instructions, I had to use @option{--enable-ft2232_libftd2xx} for OpenOCD to
+build properly.}
@item
---enable-ft2232_libftdi
+@option{--enable-ft2232_libftdi}
@item
---with-ftd2xx=/path/to/d2xx/
+@option{--with-ftd2xx=/path/to/d2xx/}
+@item
+@option{--enable-gw16012}
+@item
+@option{--enable-usbprog}
+@item
+@option{--enable-presto_libftdi}
+@item
+@option{--enable-presto_ftd2xx}
+@item
+@option{--enable-jlink}
@end itemize
If you want to access the parallel port using the PPDEV interface you have to specify
Linux users should copy the various parts of the D2XX package to the appropriate
locations, i.e. /usr/include, /usr/lib.
+Miscellaneous configure options
+
+@itemize @bullet
+@item
+@option{--enable-gccwarnings} - enable extra gcc warnings during build
+@end itemize
+
@node Running
@chapter Running
-@cindex running openocd
-The OpenOCD runs as a daemon, waiting for connections from clients (Telnet or GDB).
-Run with @option{--help} or @option{-h} to view the available command line arguments.
+@cindex running OpenOCD
+@cindex --configfile
+@cindex --debug_level
+@cindex --logfile
+@cindex --search
+OpenOCD runs as a daemon, waiting for connections from clients (Telnet, GDB, Other).
+Run with @option{--help} or @option{-h} to view the available command line switches.
It reads its configuration by default from the file openocd.cfg located in the current
working directory. This may be overwritten with the @option{-f <configfile>} command line
-switch.
+switch. The @option{-f} command line switch can be specified multiple times, in which case the config files
+are executed in order.
+
+Also it is possible to interleave commands w/config scripts using the @option{-c} command line switch.
To enable debug output (when reporting problems or working on OpenOCD itself), use
-the @option{-d} command line switch. This sets the debug_level to "3", outputting
+the @option{-d} command line switch. This sets the @option{debug_level} to "3", outputting
the most information, including debug messages. The default setting is "2", outputting
only informational messages, warnings and errors. You can also change this setting
-from within a telnet or gdb session (@option{debug_level <n>}).
+from within a telnet or gdb session using @option{debug_level <n>} @xref{debug_level}.
+
+You can redirect all output from the daemon to a file using the @option{-l <logfile>} switch.
-You can redirect all output from the daemon to a file using the @option{-l <logfile>} switch.
+Search paths for config/script files can be added to OpenOCD by using
+the @option{-s <search>} switch. The current directory and the OpenOCD target library
+is in the search path by default.
+
+Note! OpenOCD will launch the GDB & telnet server even if it can not establish a connection
+with the target. In general, it is possible for the JTAG controller to be unresponsive until
+the target is set up correctly via e.g. GDB monitor commands in a GDB init script.
@node Configuration
@chapter Configuration
@cindex configuration
-The Open On-Chip Debugger (OpenOCD) runs as a daemon, and reads it current configuration
+OpenOCD runs as a daemon, and reads it current configuration
by default from the file openocd.cfg in the current directory. A different configuration
-file can be specified with the @option{-f <conf.file>} given at the openocd command line.
+file can be specified with the @option{-f <conf.file>} command line switch specified when starting OpenOCD.
The configuration file is used to specify on which ports the daemon listens for new
connections, the JTAG interface used to connect to the target, the layout of the JTAG
@section Daemon configuration
@itemize @bullet
+@item @b{init}
+@*This command terminates the configuration stage and enters the normal
+command mode. This can be useful to add commands to the startup scripts and commands
+such as resetting the target, programming flash, etc. To reset the CPU upon startup,
+add "init" and "reset" at the end of the config script or at the end of the
+OpenOCD command line using the @option{-c} command line switch.
+@cindex init
@item @b{telnet_port} <@var{number}>
@cindex telnet_port
-Port on which to listen for incoming telnet connections
+@*Port on which to listen for incoming telnet connections
+@item @b{telnet_async} <@var{enable/disable}>
+@cindex telnet_async
+@*Enable/disable asynchronous messages. Default off. Slows down debugging
+if enabled and telnet session is open while stepping.
+@item @b{tcl_port} <@var{number}>
+@cindex tcl_port
+@*Port on which to listen for incoming TCL syntax. This port is intended as
+a simplified RPC connection that can be used by clients to issue commands
+and get the output from the TCL engine.
@item @b{gdb_port} <@var{number}>
@cindex gdb_port
-First port on which to listen for incoming GDB connections. The GDB port for the
+@*First port on which to listen for incoming GDB connections. The GDB port for the
first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
-@item @b{daemon_startup} <@var{mode}> either @samp{attach} or @samp{reset}
-@cindex daemon_startup
-Tells the OpenOCD whether it should reset the target when the daemon is launched, or
-if it should just attach to the target.
+@item @b{gdb_breakpoint_override} <@var{hard|soft|disabled}>
+@cindex gdb_breakpoint_override
+@anchor{gdb_breakpoint_override}
+@*Force breakpoint type for gdb 'break' commands.
+The raison d'etre for this option is to support GDB GUI's without
+a hard/soft breakpoint concept where the default OpenOCD and
+GDB behaviour is not sufficient. Note that GDB will use hardware
+breakpoints if the memory map has been set up for flash regions.
+
+This option replaces older arm7_9 target commands that addressed
+the same issue.
+@item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
+@cindex gdb_detach
+@*Configures what OpenOCD will do when gdb detaches from the daeman.
+Default behaviour is <@var{resume}>
+@item @b{gdb_memory_map} <@var{enable|disable}>
+@cindex gdb_memory_map
+@*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb when
+requested. gdb will then know when to set hardware breakpoints, and program flash
+using the gdb load command. @option{gdb_flash_program enable} will also need enabling
+for flash programming to work.
+Default behaviour is <@var{enable}>
+@xref{gdb_flash_program}.
+@item @b{gdb_flash_program} <@var{enable|disable}>
+@cindex gdb_flash_program
+@anchor{gdb_flash_program}
+@*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
+vFlash packet is received.
+Default behaviour is <@var{enable}>
@end itemize
@section JTAG interface configuration
@itemize @bullet
@item @b{interface} <@var{name}>
@cindex interface
-Use the interface driver <@var{name}> to connect to the target. Currently supported
+@*Use the interface driver <@var{name}> to connect to the target. Currently supported
interfaces are
@itemize @minus
-@item parport
+@item @b{parport}
PC parallel port bit-banging (Wigglers, PLD download cable, ...)
@end itemize
@itemize @minus
-@item amt_jtagaccel
+@item @b{amt_jtagaccel}
Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
mode parallel port
@end itemize
@itemize @minus
-@item ft2232
+@item @b{ft2232}
FTDI FT2232 based devices using either the open-source libftdi or the binary only
FTD2XX driver. The FTD2XX is superior in performance, but not available on every
platform. The libftdi uses libusb, and should be portable to all systems that provide
libusb.
@end itemize
@itemize @minus
-@item ep93xx
+@item @b{ep93xx}
Cirrus Logic EP93xx based single-board computer bit-banging (in development)
@end itemize
+@itemize @minus
+@item @b{presto}
+ASIX PRESTO USB JTAG programmer.
+@end itemize
+@itemize @minus
+@item @b{usbprog}
+usbprog is a freely programmable USB adapter.
+@end itemize
+@itemize @minus
+@item @b{gw16012}
+Gateworks GW16012 JTAG programmer.
+@end itemize
+@itemize @minus
+@item @b{jlink}
+Segger jlink usb adapter
+@end itemize
@end itemize
@itemize @bullet
-@item @b{jtag_speed} <@var{number}>
+@item @b{jtag_speed} <@var{reset speed}>
@cindex jtag_speed
-Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
+@*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
speed. The actual effect of this option depends on the JTAG interface used.
+The speed used during reset can be adjusted using setting jtag_speed during
+pre_reset and post_reset events.
+@itemize @minus
+
+@item wiggler: maximum speed / @var{number}
+@item ft2232: 6MHz / (@var{number}+1)
+@item amt jtagaccel: 8 / 2**@var{number}
+@item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
+@end itemize
+
+Note: Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is
+especially true for synthesized cores (-S).
+
+@item @b{jtag_khz} <@var{reset speed kHz}>
+@cindex jtag_khz
+@*Same as jtag_speed, except that the speed is specified in maximum kHz. If
+the device can not support the rate asked for, or can not translate from
+kHz to jtag_speed, then an error is returned. 0 means RTCK. If RTCK
+is not supported, then an error is reported.
+
@item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
@cindex reset_config
-The configuration of the reset signals available on the JTAG interface AND the target.
+@*The configuration of the reset signals available on the JTAG interface AND the target.
If the JTAG interface provides SRST, but the target doesn't connect that signal properly,
-then OpenOCD can't use it. <@var{signals}> can be @samp{none}, @samp{trst_only},
-@samp{srst_only} or @samp{trst_and_srst}.
+then OpenOCD can't use it. <@var{signals}> can be @option{none}, @option{trst_only},
+@option{srst_only} or @option{trst_and_srst}.
+
[@var{combination}] is an optional value specifying broken reset signal implementations.
-@samp{srst_pulls_trst} states that the testlogic is reset together with the reset of
-the system (e.g. Philips LPC2000, "broken" board layout), @samp{trst_pulls_srst} says
+@option{srst_pulls_trst} states that the testlogic is reset together with the reset of
+the system (e.g. Philips LPC2000, "broken" board layout), @option{trst_pulls_srst} says
that the system is reset together with the test logic (only hypothetical, I haven't
seen hardware with such a bug, and can be worked around).
+@option{combined} imples both @option{srst_pulls_trst} and @option{trst_pulls_srst}.
+The default behaviour if no option given is @option{separate}.
The [@var{trst_type}] and [@var{srst_type}] parameters allow the driver type of the
-reset lines to be specified. Possible values are @samp{trst_push_pull} (default)
-and @samp{trst_open_drain} for the test reset signal, and @samp{srst_open_drain}
-(default) and @samp{srst_push_pull} for the system reset. These values only affect
+reset lines to be specified. Possible values are @option{trst_push_pull} (default)
+and @option{trst_open_drain} for the test reset signal, and @option{srst_open_drain}
+(default) and @option{srst_push_pull} for the system reset. These values only affect
JTAG interfaces with support for different drivers, like the Amontec JTAGkey and JTAGAccelerator.
@item @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
@cindex jtag_device
-Describes the devices that form the JTAG daisy chain, with the first device being
+@*Describes the devices that form the JTAG daisy chain, with the first device being
the one closest to TDO. The parameters are the length of the instruction register
(4 for all ARM7/9s), the value captured during Capture-IR (0x1 for ARM7/9), and a mask
of bits that should be validated when doing IR scans (all four bits (0xf) for ARM7/9).
@item @b{jtag_nsrst_delay} <@var{ms}>
@cindex jtag_nsrst_delay
-How long (in miliseconds) the OpenOCD should wait after deasserting nSRST before
+@*How long (in milliseconds) OpenOCD should wait after deasserting nSRST before
starting new JTAG operations.
@item @b{jtag_ntrst_delay} <@var{ms}>
@cindex jtag_ntrst_delay
-How long (in miliseconds) the OpenOCD should wait after deasserting nTRST before
-starting new JTAG operations.
+@*Same @b{jtag_nsrst_delay}, but for nTRST
The jtag_n[st]rst_delay options are useful if reset circuitry (like a reset supervisor,
or on-chip features) keep a reset line asserted for some time after the external reset
@itemize @bullet
@item @b{parport_port} <@var{number}>
@cindex parport_port
-Either the address of the I/O port (default: 0x378 for LPT1) or the number of
+@*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
the @file{/dev/parport} device
When using PPDEV to access the parallel port, use the number of the parallel port:
you may encounter a problem.
@item @b{parport_cable} <@var{name}>
@cindex parport_cable
-The layout of the parallel port cable used to connect to the target.
+@*The layout of the parallel port cable used to connect to the target.
Currently supported cables are
@itemize @minus
-@item wiggler
+@item @b{wiggler}
@cindex wiggler
-Original Wiggler layout, also supported by several clones, such
+The original Wiggler layout, also supported by several clones, such
as the Olimex ARM-JTAG
-@item old_amt_wiggler
+@item @b{wiggler2}
+@cindex wiggler2
+Same as original wiggler except an led is fitted on D5.
+@item @b{wiggler_ntrst_inverted}
+@cindex wiggler_ntrst_inverted
+Same as original wiggler except TRST is inverted.
+@item @b{old_amt_wiggler}
@cindex old_amt_wiggler
The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
version available from the website uses the original Wiggler layout ('@var{wiggler}')
-@item chameleon
+@item @b{chameleon}
@cindex chameleon
-Describes the connection of the Amontec Chameleon's CPLD when operated in
-configuration mode. This is only used to program the Chameleon itself, not
-a connected target.
-@item dlc5
+The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
+program the Chameleon itself, not a connected target.
+@item @b{dlc5}
@cindex dlc5
-Xilinx Parallel cable III.
-@item triton
+The Xilinx Parallel cable III.
+@item @b{triton}
@cindex triton
The parallel port adapter found on the 'Karo Triton 1 Development Board'.
This is also the layout used by the HollyGates design
(see @uref{http://www.lartmaker.nl/projects/jtag/}).
-@item flashlink
+@item @b{flashlink}
@cindex flashlink
-ST Parallel cable.
+The ST Parallel cable.
+@item @b{arm-jtag}
+@cindex arm-jtag
+Same as original wiggler except SRST and TRST connections reversed and
+TRST is also inverted.
+@item @b{altium}
+@cindex altium
+Altium Universal JTAG cable.
@end itemize
-@item @b{parport_write_on_exit} <@var{on|off}>
+@item @b{parport_write_on_exit} <@var{on}|@var{off}>
@cindex parport_write_on_exit
-This will configure the parallel driver to write a known value to the parallel
-interface on exiting openocd
+@*This will configure the parallel driver to write a known value to the parallel
+interface on exiting OpenOCD
@end itemize
@section amt_jtagaccel options
@itemize @bullet
@item @b{parport_port} <@var{number}>
@cindex parport_port
-Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
+@*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
@file{/dev/parport} device
@end itemize
@section ft2232 options
@itemize @bullet
@item @b{ft2232_device_desc} <@var{description}>
@cindex ft2232_device_desc
-The USB device description of the FTDI FT2232 device. If not specified, the FTDI
+@*The USB device description of the FTDI FT2232 device. If not specified, the FTDI
default value is used. This setting is only valid if compiled with FTD2XX support.
+@item @b{ft2232_serial} <@var{serial-number}>
+@cindex ft2232_serial
+@*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
+values are used.
@item @b{ft2232_layout} <@var{name}>
@cindex ft2232_layout
-The layout of the FT2232 GPIO signals used to control output-enables and reset
+@*The layout of the FT2232 GPIO signals used to control output-enables and reset
signals. Valid layouts are
@itemize @minus
-@item usbjtag
-The "USBJTAG-1" layout described in the original OpenOCD diploma thesis
-@item jtagkey
+@item @b{usbjtag}
+"USBJTAG-1" layout described in the original OpenOCD diploma thesis
+@item @b{jtagkey}
Amontec JTAGkey and JTAGkey-tiny
-@item signalyzer
+@item @b{signalyzer}
Signalyzer
-@item olimex-jtag
+@item @b{olimex-jtag}
Olimex ARM-USB-OCD
-@item m5960
+@item @b{m5960}
American Microsystems M5960
-@item evb_lm3s811
+@item @b{evb_lm3s811}
Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
SRST signals on external connector
-@item comstick
+@item @b{comstick}
Hitex STR9 comstick
-@item stm32stick
+@item @b{stm32stick}
Hitex STM32 Performance Stick
+@item @b{flyswatter}
+Tin Can Tools Flyswatter
+@item @b{turtelizer2}
+egnite Software turtelizer2
+@item @b{oocdlink}
+OOCDLink
@end itemize
@item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
-The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
-default values are used. This command is not available on Windows.
+@*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
+default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, eg.
+@smallexample
+ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
+@end smallexample
@item @b{ft2232_latency} <@var{ms}>
-On some systems using ft2232 based JTAG interfaces the FT_Read function call in
+@*On some systems using ft2232 based JTAG interfaces the FT_Read function call in
ft2232_read() fails to return the expected number of bytes. This can be caused by
USB communication delays and has proved hard to reproduce and debug. Setting the
FT2232 latency timer to a larger value increases delays for short USB packages but it
@section Target configuration
@itemize @bullet
-@item @b{target} <@var{type}> <@var{endianess}> <@var{reset_mode}> <@var{JTAG pos}>
+@item @b{target} <@var{type}> <@var{endianess}> <@var{JTAG pos}>
<@var{variant}>
@cindex target
-Defines a target that should be debugged. Currently supported types are:
+@*Defines a target that should be debugged. Currently supported types are:
@itemize @minus
-@item arm7tdmi
-@item arm720t
-@item arm9tdmi
-@item arm920t
-@item arm922t
-@item arm926ejs
-@item arm966e
-@item cortex_m3
-@item xscale
+@item @b{arm7tdmi}
+@item @b{arm720t}
+@item @b{arm9tdmi}
+@item @b{arm920t}
+@item @b{arm922t}
+@item @b{arm926ejs}
+@item @b{arm966e}
+@item @b{cortex_m3}
+@item @b{feroceon}
+@item @b{xscale}
+@item @b{mips_m4k}
@end itemize
If you want to use a target board that is not on this list, see Adding a new
Endianess may be @option{little} or @option{big}.
-The reset_mode specifies what should happen to the target when a reset occurs:
-@itemize @minus
-@item reset_halt
-@cindex reset_halt
-Immediately request a target halt after reset. This allows targets to be debugged
-from the very first instruction. This is only possible with targets and JTAG
-interfaces that correctly implement the reset signals.
-@item reset_init
-@cindex reset_init
-Similar to @option{reset_halt}, but executes the script file defined to handle the
-'reset' event for the target. Like @option{reset_halt} this only works with
-correct reset implementations.
-@item reset_run
-@cindex reset_run
-Simply let the target run after a reset.
-@item run_and_halt
-@cindex run_and_halt
-Let the target run for some time (default: 1s), and then request halt.
-@item run_and_init
-@cindex run_and_init
-A combination of @option{reset_init} and @option{run_and_halt}. The target is allowed
-to run for some time, then halted, and the @option{reset} event script is executed.
-@end itemize
-
-On JTAG interfaces / targets where system reset and test-logic reset can't be driven
-completely independent (like the LPC2000 series), or where the JTAG interface is
-unavailable for some time during startup (like the STR7 series), you can't use
-@option{reset_halt} or @option{reset_init}.
-
@item @b{target_script} <@var{target#}> <@var{event}> <@var{script_file}>
@cindex target_script
-Event is either @var{reset} or @var{post_halt} or @var{pre_resume}.
-TODO: describe exact semantic of events
-@item @b{run_and_halt_time} <@var{target#}> <@var{time_in_ms}>
-@cindex run_and_halt_time
-The amount of time the debugger should wait after releasing reset before it asserts
-a debug request. This is used by the @option{run_and_halt} and @option{run_and_init}
-reset modes.
-@item @b{working_area} <@var{target#}> <@var{address}> <@var{size}>
-<@var{backup}|@var{nobackup}>
+@*Event is one of the following:
+@option{pre_reset}, @option{reset}, @option{post_reset}, @option{post_halt},
+@option{pre_resume} or @option{gdb_program_config}.
+@option{post_reset} and @option{reset} will produce the same results.
+
+@item @b{working_area} <@var{target#}> <@var{address}> <@var{size}> <@var{backup}|@var{nobackup}> [@option{virtual address}]
@cindex working_area
-Specifies a working area for the debugger to use. This may be used to speed-up
+@*Specifies a working area for the debugger to use. This may be used to speed-up
downloads to target memory and flash operations, or to perform otherwise unavailable
operations (some coprocessor operations on ARM7/9 systems, for example). The last
-parameter decides whether the memory should be preserved <@var{backup}>. If possible, use
-a working_area that doesn't need to be backed up, as that slows down operation.
+parameter decides whether the memory should be preserved (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If possible, use
+a working_area that doesn't need to be backed up, as performing a backup slows down operation.
@end itemize
@subsection arm7tdmi options
@cindex arm7tdmi options
-target arm7tdmi <@var{endianess}> <@var{reset_mode}> <@var{jtag#}>
-The arm7tdmi target definition requires at least one additional argument, specifying
+target arm7tdmi <@var{endianess}> <@var{jtag#}>
+@*The arm7tdmi target definition requires at least one additional argument, specifying
the position of the target in the JTAG daisy-chain. The first JTAG device is number 0.
The optional [@var{variant}] parameter has been removed in recent versions.
The correct feature set is determined at runtime.
@cindex arm966e options
ARM966e options are similar to ARM9TDMI options.
+@subsection cortex_m3 options
+@cindex cortex_m3 options
+use variant <@var{variant}> @option{lm3s} when debugging luminary lm3s targets. This will cause
+openocd to use a software reset rather than asserting SRST to avoid a issue with clearing
+the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
+be detected and the normal reset behaviour used.
+
@subsection xscale options
@cindex xscale options
Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},
@item @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
<@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
@cindex flash bank
-Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
+@*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
and <@var{bus_width}> bytes using the selected flash <driver>.
-
-@item @b{flash autoerase} <@option{on}|@option{off}>
-@cindex flash autoerase
-auto erase flash banks prior to writing. Currently only works when using
-@option{flash write_image} command. Default is @option{off}.
@end itemize
@subsection lpc2000 options
@b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
<@var{clock}> [@var{calc_checksum}]
-LPC flashes don't require the chip and bus width to be specified. Additional
+@*LPC flashes don't require the chip and bus width to be specified. Additional
parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
of the target this flash belongs to (first is 0), the frequency at which the core
@cindex cfi options
@b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
-<@var{target#}>
-CFI flashes require the number of the target they're connected to as an additional
+<@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
+@*CFI flashes require the number of the target they're connected to as an additional
argument. The CFI driver makes use of a working area (specified for the target)
to significantly speed up operation.
+@var{chip_width} and @var{bus_width} are specified in bytes.
+
+The @var{jedec_probe} option is used to detect certain non-CFI flash roms, like AM29LV010 and similar types.
+
+@var{x16_as_x8} ???
+
@subsection at91sam7 options
@cindex at91sam7 options
-@b{flash bank at91sam7} 0 0 0 0 <@var{target#>}>
-AT91SAM7 flashes only require the target#, all other values are looked up after
+@b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
+@*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
reading the chip-id and type.
@subsection str7 options
@cindex str7 options
@b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
-variant can be either STR71x, STR73x or STR75x.
+@*variant can be either STR71x, STR73x or STR75x.
@subsection str9 options
@cindex str9 options
@b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
-The str9 needs the flash controller to be configured prior to Flash programming, eg.
+@*The str9 needs the flash controller to be configured prior to Flash programming, eg.
@smallexample
str9x flash_config 0 4 2 0 0x80000
@end smallexample
@subsection str9 options (str9xpec driver)
@b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
-Before using the flash commands the turbo mode will need enabling using str9xpec
+@*Before using the flash commands the turbo mode will need enabling using str9xpec
@option{enable_turbo} <@var{num>.}
Only use this driver for locking/unlocking the device or configuring the option bytes.
@cindex stellaris (LM3Sxxx) options
@b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
-stellaris flash plugin only require the target#.
+@*stellaris flash plugin only require the @var{target#}.
@subsection stm32x options
@cindex stm32x options
@b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
-stm32x flash plugin only require the target#.
+@*stm32x flash plugin only require the @var{target#}.
+
+@subsection aduc702x options
+@cindex aduc702x options
+
+@b{flash bank aduc702x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
+@*aduc702x flash plugin require the flash @var{base}, @var{size} and @var{target#}.
+
+@section mFlash configuration
+@cindex mFlash configuration
+
+@itemize @bullet
+@item @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
+<@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
+@cindex mflash bank
+@*Configures a mflash for <@var{soc}> host bank at <@var{base}>. <@var{chip_width}> and
+<@var{bus_width}> are bytes order. Pin number format is dependent on host GPIO calling convention.
+If WP or DPD pin was not used, write -1. Currently, mflash bank support s3c2440 and pxa270.
+@end itemize
+(ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
+@smallexample
+mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
+@end smallexample
+(ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
+@smallexample
+mflash bank pxa270 0x08000000 2 2 43 -1 51 0
+@end smallexample
+
+@node Target library
+@chapter Target library
+@cindex Target library
+
+OpenOCD comes with a target configuration script library. These scripts can be
+used as-is or serve as a starting point.
+
+The target library is published together with the openocd executable and
+the path to the target library is in the OpenOCD script search path.
+Similarly there are example scripts for configuring the JTAG interface.
+
+The command line below uses the example parport configuration scripts
+that ship with OpenOCD, then configures the str710.cfg target and
+finally issues the init and reset command. The communication speed
+is set to 10kHz for reset and 8MHz for post reset.
+
+
+@smallexample
+openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
+@end smallexample
+
+
+To list the target scripts available:
+
+@smallexample
+$ ls /usr/local/lib/openocd/target
+
+arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
+at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
+at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
+at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
+@end smallexample
+
@node Commands
@chapter Commands
@cindex commands
-The Open On-Chip Debugger (OpenOCD) allows user interaction through a telnet interface
-(default: port 4444) and a GDB server (default: port 3333). The command line interpreter
+OpenOCD allows user interaction through a GDB server (default: port 3333),
+a telnet interface (default: port 4444), and a TCL interface (default: port 5555). The command line interpreter
is available from both the telnet interface and a GDB session. To issue commands to the
interpreter from within a GDB session, use the @option{monitor} command, e.g. use
@option{monitor poll} to issue the @option{poll} command. All output is relayed through the
GDB session.
+The TCL interface is used as a simplified RPC mechanism that feeds all the
+input into the TCL interpreter and returns the output from the evaluation of
+the commands.
+
@section Daemon
@itemize @bullet
@item @b{sleep} <@var{msec}>
@cindex sleep
-Wait for n milliseconds before resuming. Useful in connection with script files
+@*Wait for n milliseconds before resuming. Useful in connection with script files
(@var{script} command and @var{target_script} configuration).
@item @b{shutdown}
@cindex shutdown
-Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet).
+@*Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other).
@item @b{debug_level} [@var{n}]
@cindex debug_level
-Display or adjust debug level to n<0-3>
+@anchor{debug_level}
+@*Display or adjust debug level to n<0-3>
+
+@item @b{fast} [@var{enable|disable}]
+@cindex fast
+@*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
+downloads and fast memory access will work if the JTAG interface isn't too fast and
+the core doesn't run at a too low frequency. Note that this option only changes the default
+and that the indvidual options, like DCC memory downloads, can be enabled and disabled
+individually.
+
+The target specific "dangerous" optimisation tweaking options may come and go
+as more robust and user friendly ways are found to ensure maximum throughput
+and robustness with a minimum of configuration.
+
+Typically the "fast enable" is specified first on the command line:
+
+@smallexample
+openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
+@end smallexample
@item @b{log_output} <@var{file}>
@cindex log_output
-Redirect logging to <file> (default: stderr)
+@*Redirect logging to <file> (default: stderr)
@item @b{script} <@var{file}>
@cindex script
-Execute commands from <file>
+@*Execute commands from <file>
@end itemize
@subsection Target state handling
@itemize @bullet
+@item @b{power} <@var{on}|@var{off}>
+@cindex reg
+@*Turn power switch to target on/off.
+No arguments: print status.
+
+
+@item @b{reg} [@option{#}|@option{name}] [value]
+@cindex reg
+@*Access a single register by its number[@option{#}] or by its [@option{name}].
+No arguments: list all available registers for the current target.
+Number or name argument: display a register
+Number or name and value arguments: set register value
+
@item @b{poll} [@option{on}|@option{off}]
@cindex poll
-Poll the target for its current state. If the target is in debug mode, architecture
-specific information about the current state are printed. An optional parameter
+@*Poll the target for its current state. If the target is in debug mode, architecture
+specific information about the current state is printed. An optional parameter
allows continuous polling to be enabled and disabled.
-@item @b{halt}
+@item @b{halt} [@option{ms}]
@cindex halt
-Send a halt request to the target. The debugger signals the debug request,
-and waits for the target to enter debug mode.
+@*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
+Default [@option{ms}] is 5 seconds if no arg given.
+Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
+will stop OpenOCD from waiting.
+
+@item @b{wait_halt} [@option{ms}]
+@cindex wait_halt
+@*Wait for the target to enter debug mode. Optional [@option{ms}] is
+a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
+arg given.
@item @b{resume} [@var{address}]
@cindex resume
-Resume the target at its current code position, or at an optional address.
+@*Resume the target at its current code position, or at an optional address.
+OpenOCD will wait 5 seconds for the target to resume.
@item @b{step} [@var{address}]
@cindex step
-Single-step the target at its current code position, or at an optional address.
+@*Single-step the target at its current code position, or at an optional address.
-@item @b{reset} [@option{run}|@option{halt}|@option{init}|@option{run_and_halt}
-|@option{run_and_init}]
+@item @b{reset} [@option{run}|@option{halt}|@option{init}]
@cindex reset
-Do a hard-reset. The optional parameter specifies what should happen after the reset.
-This optional parameter overwrites the setting specified in the configuration file,
-making the new behaviour the default for the @option{reset} command.
+@*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
+
+With no arguments a "reset run" is executed
@itemize @minus
-@item run
+@item @b{run}
@cindex reset run
-Let the target run.
-@item halt
+@*Let the target run.
+@item @b{halt}
@cindex reset halt
-Immediately halt the target (works only with certain configurations).
-@item init
+@*Immediately halt the target (works only with certain configurations).
+@item @b{init}
@cindex reset init
-Immediately halt the target, and execute the reset script (works only with certain
+@*Immediately halt the target, and execute the reset script (works only with certain
configurations)
-@item run_and_halt
-@cindex reset run_and_halt
-Let the target run for a certain amount of time, then request a halt.
-@item run_and_init
-@cindex reset run_and_init
-Let the target run for a certain amount of time, then request a halt. Execute the
-reset script once the target entered debug mode.
@end itemize
+
+@item @b{soft_reset_halt}
+@cindex reset
+@*Requesting target halt and executing a soft reset.
@end itemize
@subsection Memory access commands
+@itemize @bullet
+@item @b{meminfo}
+
+display available ram memory.
+@end itemize
These commands allow accesses of a specific size to the memory system:
@itemize @bullet
@item @b{mdw} <@var{addr}> [@var{count}]
@cindex mdw
-display memory words
+@*display memory words
@item @b{mdh} <@var{addr}> [@var{count}]
@cindex mdh
-display memory half-words
+@*display memory half-words
@item @b{mdb} <@var{addr}> [@var{count}]
@cindex mdb
-display memory bytes
+@*display memory bytes
@item @b{mww} <@var{addr}> <@var{value}>
@cindex mww
-write memory word
+@*write memory word
@item @b{mwh} <@var{addr}> <@var{value}>
@cindex mwh
-write memory half-word
+@*write memory half-word
@item @b{mwb} <@var{addr}> <@var{value}>
@cindex mwb
-write memory byte
+@*write memory byte
@item @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
@cindex load_image
-Load image <@var{file}> to target memory at <@var{address}>
+@anchor{load_image}
+@*Load image <@var{file}> to target memory at <@var{address}>
+@item @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
+@cindex fast_load_image
+@anchor{fast_load_image}
+@*Normally you should be using @b{load_image} or GDB load. However, for
+testing purposes or when IO overhead is significant(OpenOCD running on embedded
+host), then storing the image in memory and uploading the image to the target
+can be a way to upload e.g. multiple debug sessions when the binary does not change.
+Arguments as @b{load_image}, but image is stored in OpenOCD host
+memory, i.e. does not affect target. This approach is also useful when profiling
+target programming performance as IO and target programming can easily be profiled
+seperately.
+@item @b{fast_load}
+@cindex fast_image
+@anchor{fast_image}
+@*Loads image stored in memory by @b{fast_load_image} to current target. Must be preceeded by fast_load_image.
@item @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
@cindex dump_image
-Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
+@anchor{dump_image}
+@*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
(binary) <@var{file}>.
@item @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
@cindex verify_image
-Verify <@var{file}> to target memory starting at <@var{address}>.
-This will first attempt using a crc checksum, if this fails it will try a binary compare.
-@item @b{load_binary} <@var{file}> <@var{address}> [DEPRECATED]
-@cindex load_binary
-Load binary <@var{file}> to target memory at <@var{address}>
-@item @b{dump_binary} <@var{file}> <@var{address}> <@var{size}> [DEPRECATED]
-@cindex dump_binary
-Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
-(binary) <@var{file}>.
+@*Verify <@var{file}> against target memory starting at <@var{address}>.
+This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.
+@end itemize
+
+@subsection Breakpoint commands
+@cindex Breakpoint commands
+@itemize @bullet
+@item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
+@cindex bp
+@*set breakpoint <address> <length> [hw]
+@item @b{rbp} <@var{addr}>
+@cindex rbp
+@*remove breakpoint <adress>
+@item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
+@cindex wp
+@*set watchpoint <address> <length> <r/w/a> [value] [mask]
+@item @b{rwp} <@var{addr}>
+@cindex rwp
+@*remove watchpoint <adress>
@end itemize
@subsection Flash commands
@itemize @bullet
@item @b{flash banks}
@cindex flash banks
-List configured flash banks
+@*List configured flash banks
@item @b{flash info} <@var{num}>
@cindex flash info
-Print info about flash bank <@option{num}>
+@*Print info about flash bank <@option{num}>
@item @b{flash probe} <@var{num}>
@cindex flash probe
-Identify the flash, or validate the parameters of the configured flash. Operation
+@*Identify the flash, or validate the parameters of the configured flash. Operation
depends on the flash type.
@item @b{flash erase_check} <@var{num}>
@cindex flash erase_check
-Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
+@*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
updates the erase state information displayed by @option{flash info}. That means you have
to issue an @option{erase_check} command after erasing or programming the device to get
updated information.
@item @b{flash protect_check} <@var{num}>
@cindex flash protect_check
-Check protection state of sectors in flash bank <num>.
-
-@item @b{flash erase} <@var{num}> <@var{first}> <@var{last}> [DEPRECATED]
-@cindex flash erase
-Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
-<@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing might
-require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
-the CFI driver). This command was replaced by the new command
+@*Check protection state of sectors in flash bank <num>.
@option{flash erase_sector} using the same syntax.
@item @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
@cindex flash erase_sector
-Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
-<@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing might
+@anchor{flash erase_sector}
+@*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
+<@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
the CFI driver).
@item @b{flash erase_address} <@var{address}> <@var{length}>
@cindex flash erase_address
-Erase sectors starting at <@var{address}> for <@var{length}> number of bytes
-@item @b{flash write} <@var{num}> <@var{file}> <@var{offset}> [DEPRECATED]
-@cindex flash write
-Write the binary <@var{file}> to flash bank <@var{num}>, starting at <@var{offset}>
-bytes from the beginning of the bank. This command was replaced by the new command
-@option{flash write_binary} using the same syntax.
-@item @b{flash write_binary} <@var{num}> <@var{file}> <@var{offset}>
-@cindex flash write_binary
-Write the binary <@var{file}> to flash bank <@var{num}>, starting at
-<@option{offset}> bytes from the beginning of the bank.
-@item @b{flash write_image} <@var{file}> [@var{offset}] [@var{type}]
+@*Erase sectors starting at <@var{address}> for <@var{length}> bytes
+@item @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
+@cindex flash write_bank
+@anchor{flash write_bank}
+@*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
+<@option{offset}> bytes from the beginning of the bank.
+@item @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
@cindex flash write_image
-Write the image <@var{file}> to the current target's flash bank(s). A relocation
+@anchor{flash write_image}
+@*Write the image <@var{file}> to the current target's flash bank(s). A relocation
[@var{offset}] can be specified and the file [@var{type}] can be specified
explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
-(ELF file) or @option{s19} (Motorola s19).
+(ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
+if the @option{erase} parameter is given.
@item @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
@cindex flash protect
-Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
-<@var{last}> of @option{flash bank} <@var{num}>.
-@item @b{flash auto_erase} <@var{on}|@var{off}>
-@cindex flash auto_erase
-Enable (@option{on}) to erase flash banks prior to writing using the flash @option{write_image} command
-only. Default is (@option{off}), flash banks have to be erased using @option{flash erase} command.
+@*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
+<@var{last}> of @option{flash bank} <@var{num}>.
+@end itemize
+
+@subsection mFlash commands
+@cindex mFlash commands
+@itemize @bullet
+@item @b{mflash probe}
+@cindex mflash probe
+Probe mflash.
+@item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
+@cindex mflash write
+Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
+<@var{offset}> bytes from the beginning of the bank.
+@item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
+@cindex mflash dump
+Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
+to a <@var{file}>.
+@end itemize
+
+@page
+@section Target Commands
+@cindex Target Commands
+
+@subsection Overview
+@cindex Overview
+Pre "TCL" - many commands in OpenOCD where implemented as C functions. Post "TCL"
+(Jim-Tcl to be more exact, June 2008) TCL became a bigger part of OpenOCD.
+
+One of the biggest changes is the introduction of 'target specific'
+commands. When every time you create a target, a special command name is
+created specifically for that target.
+For example - in TCL/TK - if you create a button (or any other screen object) you
+can specify various "button configuration parameters". One of those parameters is
+the "object cmd/name" [ In TK - this is referred to as the object path ]. Later
+you can use that 'path' as a command to modify the button, for example to make it
+"grey", or change the color. In effect, the "path" function is an 'object
+oriented command'. The TCL change in OpenOCD follows the same principle, you create
+a target, and a specific "targetname" command is created.
+
+There are two methods of creating a target:
+
+@enumerate
+@item
+Using the old syntax (deprecated). Target names are autogenerated as:
+ "target0", "target1", etc.;
+@cindex old syntax
+@item
+Using the new syntax, you can specify the name of the target.
+@cindex new syntax
+@end enumerate
+
+As most users will have a single JTAG target, and by default the command name will
+probably default to "target0", thus for reasons of simplicity the instructions below
+use the name "target0".
+
+@subsection Commands
+@cindex Commands
+OpenOCD has the following 'target' or 'target-like' commands:
+
+@enumerate
+@item
+@b{targets (plural)} - lists all known targets and a little bit of information about each
+ target, most importantly the target *COMMAND*NAME* (it also lists the target number);
+@cindex targets
+@item
+@b{target (singular)} - used to create, configure list, etc the targets;
+@cindex target
+@item
+@b{target0} - the command object for the first target. Unless you specified another name.
+@cindex target0
+@end enumerate
+
+@subsubsection Targets Command
+@cindex Targets Command
+The "targets" command has 2 functions:
+
+@itemize
+@item
+With a parameter, you can change the current command line target.
+
+NOTE: "with a parameter" is really only useful with 'multiple JTAG targets' not something
+you normally encounter (ie: If you had 2 arm chips - sharing the same JTAG chain).
+@verbatim
+# using a target name.
+(gdb) mon targets target0
+# or a target by number.
+(gdb) mon targets 3
+@end verbatim
+@cindex with a parameter
+@item
+Plain, without any parameter lists targets, for example:
+
+@verbatim
+(gdb) mon targets
+ CmdName Type Endian ChainPos State
+-- ---------- ---------- ---------- -------- ----------
+ 0: target0 arm7tdmi little 0 halted
+@end verbatim
+
+This shows:
+@enumerate a
+@item
+in this example, a single target;
+@item
+target number 0 (1st column);
+@item
+the 'object name' is target0 (the default name);
+@item
+it is an arm7tdmi;
+@item
+little endian;
+@item
+the position in the JTAG chain;
+@item
+and is currently halted.
+@end enumerate
+@cindex without any parameter
+@end itemize
+
+@subsubsection Target Command
+@cindex Target Command
+
+The "target" command has the following options:
+@itemize
+@item
+target create
+
+@verbatim
+ target create CMDNAME TYPE ... config options ...
+ argv[0] = 'target'
+ argv[1] = 'create'
+ argv[2] = the 'object command'
+ (normally, target0, see (3) above)
+ argv[3] = the target type, ie: arm7tdmi
+ argv[4..N] = configuration parameters
+@end verbatim
+@item
+target types
+
+ Lists all supported target types; ie: arm7tdmi, xscale, fericon, cortex-m3.
+ The result TCL list of all known target types (and is human readable).
+@item
+target names
+
+ Returns a TCL list of all known target commands (and is human readable).
+
+ Example:
+@verbatim
+ foreach t [target names] {
+ puts [format "Target: %s\n" $t]
+ }
+@end verbatim
+@item
+target current
+
+ Returns the TCL command name of the current target.
+
+ Example:
+@verbatim
+ set ct [target current]
+ set t [$ct cget -type]
+
+ puts "Current target name is: $ct, and is a: $t"
+@end verbatim
+@item
+target number <VALUE>
+
+ Returns the TCL command name of the specified target.
+
+ Example
+@verbatim
+ set thename [target number $x]
+ puts [format "Target %d is: %s\n" $x $thename]
+@end verbatim
+ For instance, assuming the defaults
+@verbatim
+ target number 0
+@end verbatim
+ Would return 'target0' (or whatever you called it)
+@item
+target count
+
+ Returns the larget+1 target number.
+
+ Example:
+@verbatim
+ set c [target count]
+ for { set x 0 } { $x < $c } { incr x } {
+ # Assuming you have this function..
+ print_target_details $x
+ }
+@end verbatim
+@end itemize
+
+@subsubsection Target0 Command
+@cindex Target0 Command
+The "target0" command (the "Target Object" command):
+
+Once a target is 'created' a command object by that targets name is created, for example
+@verbatim
+ target create BiGRed arm7tdmi -endian little -chain-position 3
+@end verbatim
+
+Would create a [case sensitive] "command" BiGRed
+
+If you use the old [deprecated] syntax, the name is automatically
+generated and is in the form:
+@verbatim
+ target0, target1, target2, target3, ... etc.
+@end verbatim
+
+@subsubsection Target CREATE, CONFIGURE and CGET Options Command
+@cindex Target CREATE, CONFIGURE and CGET Options Command
+The commands:
+@verbatim
+ target create CMDNAME TYPE [configure-options]
+ CMDNAME configure [configure-options]
+ CMDNAME cget [configure-options]
+@end verbatim
+@itemize
+@item
+In the 'create' case, one is creating the target and can specify any
+number of configuration parameters.
+@item
+In the 'CMDNAME configure' case, one can change the setting [Not all things can, or should be changed].
+@item
+In the 'CMDNAME cget' case, the goal is to query the target for a
+specific configuration option.
+@end itemize
+
+In the above, the "default" name target0 is 'target0'.
+
+ Example:
+
+ From the (gdb) prompt, one can type this:
+
+@verbatim
+ (gdb) mon target0 configure -endian big
+@end verbatim
+
+ And change target0 to 'big-endian'. This is a contrived example,
+ specifically for this document - don't expect changing endian
+ 'mid-operation' to work you should set the endian at creation.
+
+Known options [30/august/2008] are:
+@itemize
+@item
+[Mandatory 'create' Options]
+ @itemize
+ @item
+ type arm7tdmi|arm720|etc ...
+ @item
+ chain-position NUMBER
+ @item
+ endian ENDIAN
+ @end itemize
+@item
+Optional
+ @itemize
+ @item
+ event EVENTNAME "tcl-action"
+ @item
+ reset RESETACTION
+ @item
+ work-area-virt ADDR
+ @item
+ work-area-phys ADDR
+ @item
+ work-area-size ADDR
+ @item
+ work-area-backup BOOLEAN
+ @end itemize
+@end itemize
+Hint: To get a list of available options, try this:
+@verbatim
+ (gdb) mon target0 cget -BLAHBLAHBLAH
+@end verbatim
+
+ the above causes an error - and a helpful list of valid options.
+
+One can query any of the above options at run time, for example:
+@verbatim
+ (gdb) mon target0 cget -OPTION [param]
+@end verbatim
+
+Example TCL script
+
+@verbatim
+ # For all targets...
+ set c [target count]
+ for { set x 0 } { $x < $c } { incr x ] {
+ set n [target number $x]
+ set t [$n cget -type]
+ set e [$n cget -endian]
+ puts [format "%d: %s, %s, endian: %s\n" $x $n $t $n]
+ }
+@end verbatim
+
+Might produce:
+
+@verbatim
+ 0: pic32chip, mips_m4k, endain: little
+ 1: arm7, arm7tdmi, endian: big
+ 2: blackfin, bf534, endian: little
+@end verbatim
+
+Notice the above example is not target0, target1, target2 Why? Because in this contrived multi-target example -
+more human understandable target names might be helpful.
+
+For example these two are the same:
+
+@verbatim
+ (gdb) mon blackfin configure -event FOO {puts "Hi mom"}
+@end verbatim
+
+or:
+
+@verbatim
+ (gdb) mon [target number 2] configure -event FOO {puts "Hi mom"}
+@end verbatim
+
+In the second case, we use [] to get the command name of target #2, in this contrived example - it is "blackfin".
+
+Two important configuration options are:
+
+ "-event" and "-reset"
+
+The "-reset" option specifies what should happen when the chip is reset, for example should it 'halt', 're-init',
+or what.
+
+The "-event" option less you specify a TCL command to occur when a specific event occurs.
+
+@subsubsection Other Target Commands
+@cindex Other Target Commands
+@itemize
+@item @b{profile} <@var{seconds}> <@var{gmon.out}>
+
+Profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC.
+@end itemize
+
+@subsection Target Events
+@cindex Target Events
+
+@subsubsection Overview
+@cindex Overview
+At various points in time - certain 'target' events happen. You can create a custom event action to occur at that time.
+For example - after reset, the PLLs and CLOCKs may need to be reconfigured, or perhaps the SDRAM needs to be re-initialized.
+Often the easiest way to do that is to create a simple script file containing the series of (mww [poke memory]) commands
+you would type by hand, to reconfigure the target clocks. You could specify the "event action" like this:
+
+@verbatim
+ (gdb) mon target0 configure -event reset-init "script cfg.clocks"
+@end verbatim
+
+In the above example, when the event "reset-init" occurs, the "action-string" will be evaluated as if you typed it at the
+console:
+@itemize
+@item @b{Option1} - The simple approach (above) is to create a script file with lots of "mww" (memory write word) commands
+ to configure your targets clocks and/or external memory;
+@item @b{Option2} - You can instead create a fancy TCL procedure and invoke that procedure instead of sourcing a file [In fact,
+ "script" is a TCL procedure that loads a file].
@end itemize
+@subsubsection Details
+@cindex Details
+There are many events one could use, to get a current list of events type the following invalid command, you'll get a helpful
+"runtime error" message, see below [list valid as of 30/august/2008]:
+
+@verbatim
+(gdb) mon target0 cget -event FAFA
+Runtime error, file "../../../openocd23/src/helper/command.c", line 433:
+ -event: Unknown: FAFA, try one of: old-pre_reset,
+ old-gdb_program_config, old-post_reset, halted,
+ resumed, resume-start, resume-end, reset-start,
+ reset-assert-pre, reset-assert-post,
+ reset-deassert-pre, reset-deassert-post,
+ reset-halt-pre, reset-halt-post, reset-wait-pre,
+ reset-wait-post, reset-init, reset-end,
+ examine-start, examine-end, debug-halted,
+ debug-resumed, gdb-attach, gdb-detach,
+ gdb-flash-write-start, gdb-flash-write-end,
+ gdb-flash-erase-start, gdb-flash-erase-end,
+ resume-start, resume-ok, or resume-end
+@end verbatim
+
+NOTE: The event-names "old-*" are deprecated and exist only to help old scripts continue to function, and the old "target_script"
+command to work. Please do not rely on them.
+
+These are some other important names:
+@itemize
+@item gdb-flash-erase-start
+@item gdb-flash-erase-end
+@item gdb-flash-write-start
+@item gdb-flash-write-end
+@end itemize
+
+These occur when GDB/OpenOCD attempts to erase & program the FLASH chip via GDB. For example - some PCBs may have a simple GPIO
+pin that acts like a "flash write protect" you might need to write a script that disables "write protect".
+
+To get a list of current 'event actions', type the following command:
+
+@verbatim
+ (gdb) mon target0 eventlist
+
+ Event actions for target (0) target0
+
+ Event | Body
+ ------------------------- | ----------------------------------------
+ old-post_reset | script event/sam7x256_reset.script
+@end verbatim
+
+Here is a simple example for all targets:
+
+@verbatim
+ (gdb) mon foreach x [target names] { $x eventlist }
+@end verbatim
+
+The above uses some TCL tricks:
+@enumerate a
+@item foreach VARIABLE LIST BODY
+@item to generate the list, we use [target names]
+@item the BODY, contains $x - the loop variable and expands to the target specific name
+@end enumerate
+
+Recalling the earlier discussion - the "object command" there are other things you can
+do besides "configure" the target.
+
+Note: Many of these commands exist as "global" commands, and they also exist as target
+specific commands. For example, the "mww" (memory write word) operates on the current
+target if you have more then 1 target, you must switch. In contrast to the normal
+commands, these commands operate on the specific target. For example, the command "mww"
+writes data to the *current* command line target.
+
+Often, you have only a single target - but if you have multiple targets (ie: a PIC32
+and an at91sam7 - your reset-init scripts might get a bit more complicated, ie: you must
+specify which of the two chips you want to write to. Writing 'pic32' clock configuration
+to an at91sam7 does not work).
+
+The commands are [as of 30/august/2008]:
+@verbatim
+ TNAME mww ADDRESS VALUE
+ TNAME mwh ADDRESS VALUE
+ TNAME mwb ADDRESS VALUE
+ Write(poke): 32, 16, 8bit values to memory.
+
+ TNAME mdw ADDRESS VALUE
+ TNAME mdh ADDRESS VALUE
+ TNAME mdb ADDRESS VALUE
+ Human 'hexdump' with ascii 32, 16, 8bit values
+
+ TNAME mem2array [see mem2array command]
+ TNAME array2mem [see array2mem command]
+
+ TNAME curstate
+ Returns the current state of the target.
+
+ TNAME examine
+ See 'advanced target reset'
+ TNAME poll
+ See 'advanced target reset'
+ TNAME reset assert
+ See 'advanced target reset'
+ TNAME reset deassert
+ See 'advanced target reset'
+ TNAME halt
+ See 'advanced target reset'
+ TNAME waitstate STATENAME
+ See 'advanced target reset'
+@end verbatim
+
@page
@section Target Specific Commands
@cindex Target Specific Commands
controller handles erases automatically on a page (128/265 byte) basis so erase is
not necessary for flash programming. AT91SAM7 processors with less than 512K flash
only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
-that can be erased separatly.Only an EraseAll command is supported by the controller
+that can be erased separatly. Only an EraseAll command is supported by the controller
for each flash plane and this is called with
@itemize @bullet
@item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
-bulk erase flash planes first_plane to last_plane.
+@*bulk erase flash planes first_plane to last_plane.
@item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
@cindex at91sam7 gpnvm
-set or clear a gpnvm bit for the processor
+@*set or clear a gpnvm bit for the processor
@end itemize
@subsection STR9 specific commands
@itemize @bullet
@item @b{str9xpec enable_turbo} <@var{num}>
@cindex str9xpec enable_turbo
-enable turbo mode, simply this will remove the str9 from the chain and talk
+@*enable turbo mode, simply this will remove the str9 from the chain and talk
directly to the embedded flash controller.
@item @b{str9xpec disable_turbo} <@var{num}>
@cindex str9xpec disable_turbo
-restore the str9 into jtag chain.
+@*restore the str9 into jtag chain.
@item @b{str9xpec lock} <@var{num}>
@cindex str9xpec lock
-lock str9 device. The str9 will only respond to an unlock command that will
+@*lock str9 device. The str9 will only respond to an unlock command that will
erase the device.
@item @b{str9xpec unlock} <@var{num}>
@cindex str9xpec unlock
-unlock str9 device.
+@*unlock str9 device.
@item @b{str9xpec options_read} <@var{num}>
@cindex str9xpec options_read
-read str9 option bytes.
+@*read str9 option bytes.
@item @b{str9xpec options_write} <@var{num}>
@cindex str9xpec options_write
-write str9 option bytes.
+@*write str9 option bytes.
@end itemize
@subsection STR9 configuration
@item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
<@var{BBADR}> <@var{NBBADR}>
@cindex str9x flash_config
-Configure str9 flash controller.
+@*Configure str9 flash controller.
@smallexample
eg. str9x flash_config 0 4 2 0 0x80000
This will setup
@itemize @bullet
@item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
@cindex str9xpec options_cmap
-configure str9 boot bank.
+@*configure str9 boot bank.
@item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
@cindex str9xpec options_lvdthd
-configure str9 lvd threshold.
+@*configure str9 lvd threshold.
@item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
@cindex str9xpec options_lvdsel
-configure str9 lvd source.
+@*configure str9 lvd source.
@item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
@cindex str9xpec options_lvdwarn
-configure str9 lvd reset warning source.
+@*configure str9 lvd reset warning source.
@end itemize
@subsection STM32x specific commands
@itemize @bullet
@item @b{stm32x lock} <@var{num}>
@cindex stm32x lock
-lock stm32 device.
+@*lock stm32 device.
@item @b{stm32x unlock} <@var{num}>
@cindex stm32x unlock
-unlock stm32 device.
+@*unlock stm32 device.
@item @b{stm32x options_read} <@var{num}>
@cindex stm32x options_read
-read stm32 option bytes.
+@*read stm32 option bytes.
@item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
<@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
@cindex stm32x options_write
-write stm32 option bytes.
+@*write stm32 option bytes.
@item @b{stm32x mass_erase} <@var{num}>
@cindex stm32x mass_erase
-mass erase flash memory.
+@*mass erase flash memory.
+@end itemize
+
+@subsection Stellaris specific commands
+@cindex Stellaris specific commands
+
+These are flash specific commands when using the Stellaris driver.
+@itemize @bullet
+@item @b{stellaris mass_erase} <@var{num}>
+@cindex stellaris mass_erase
+@*mass erase flash memory.
@end itemize
@page
-@section Arcitecture Specific Commands
-@cindex Arcitecture Specific Commands
+@section Architecture Specific Commands
+@cindex Architecture Specific Commands
@subsection ARMV4/5 specific commands
@cindex ARMV4/5 specific commands
@itemize @bullet
@item @b{armv4_5 reg}
@cindex armv4_5 reg
-Display a list of all banked core registers, fetching the current value from every
+@*Display a list of all banked core registers, fetching the current value from every
core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
register value.
-@item @b{armv4_5 core_mode} [@option{arm}|@option{thumb}]
+@item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
@cindex armv4_5 core_mode
-Displays the core_mode, optionally changing it to either ARM or Thumb mode.
+@*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
The target is resumed in the currently set @option{core_mode}.
@end itemize
These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
ARM920t or ARM926EJ-S.
@itemize @bullet
-@item @b{arm7_9 sw_bkpts} <@option{enable}|@option{disable}>
-@cindex arm7_9 sw_bkpts
-Enable/disable use of software breakpoints. On ARMv4 systems, this reserves
-one of the watchpoint registers to implement software breakpoints. Disabling
-SW Bkpts frees that register again.
-@item @b{arm7_9 force_hw_bkpts} <@option{enable}|@option{disable}>
-@cindex arm7_9 force_hw_bkpts
-When @option{force_hw_bkpts} is enabled, the @option{sw_bkpts} support is disabled, and all
-breakpoints are turned into hardware breakpoints.
-@item @b{arm7_9 dbgrq} <@option{enable}|@option{disable}>
+@item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
@cindex arm7_9 dbgrq
-Enable use of the DBGRQ bit to force entry into debug mode. This should be
+@*Enable use of the DBGRQ bit to force entry into debug mode. This should be
safe for all but ARM7TDMI--S cores (like Philips LPC).
-@item @b{arm7_9 fast_writes} <@option{enable}|@option{disable}>
-@cindex arm7_9 fast_writes [DEPRECATED]
-See @option{arm7_9 fast_memory_access} instead.
-@item @b{arm7_9 fast_memory_access} <@option{enable}|@option{disable}>
+@item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
@cindex arm7_9 fast_memory_access
-Allow the OpenOCD to read and write memory without checking completion of
+@anchor{arm7_9 fast_memory_access}
+@*Allow OpenOCD to read and write memory without checking completion of
the operation. This provides a huge speed increase, especially with USB JTAG
cables (FT2232), but might be unsafe if used with targets running at a very low
speed, like the 32kHz startup clock of an AT91RM9200.
-@item @b{arm7_9 dcc_downloads} <@option{enable}|@option{disable}>
+@item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
@cindex arm7_9 dcc_downloads
-Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
+@*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
unsafe, especially with targets running at a very low speed. This command was introduced
with OpenOCD rev. 60.
@end itemize
+@subsection ARM720T specific commands
+@cindex ARM720T specific commands
+
+@itemize @bullet
+@item @b{arm720t cp15} <@var{num}> [@var{value}]
+@cindex arm720t cp15
+@*display/modify cp15 register <@option{num}> [@option{value}].
+@item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
+@cindex arm720t md<bhw>_phys
+@*Display memory at physical address addr.
+@item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
+@cindex arm720t mw<bhw>_phys
+@*Write memory at physical address addr.
+@item @b{arm720t virt2phys} <@var{va}>
+@cindex arm720t virt2phys
+@*Translate a virtual address to a physical address.
+@end itemize
+
+@subsection ARM9TDMI specific commands
+@cindex ARM9TDMI specific commands
+
+@itemize @bullet
+@item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
+@cindex arm9tdmi vector_catch
+@*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
+@option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
+@option{irq} @option{fiq}.
+
+Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
+@end itemize
+
+@subsection ARM966E specific commands
+@cindex ARM966E specific commands
+
+@itemize @bullet
+@item @b{arm966e cp15} <@var{num}> [@var{value}]
+@cindex arm966e cp15
+@*display/modify cp15 register <@option{num}> [@option{value}].
+@end itemize
+
@subsection ARM920T specific commands
@cindex ARM920T specific commands
@itemize @bullet
+@item @b{arm920t cp15} <@var{num}> [@var{value}]
+@cindex arm920t cp15
+@*display/modify cp15 register <@option{num}> [@option{value}].
+@item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
+@cindex arm920t cp15i
+@*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
@item @b{arm920t cache_info}
@cindex arm920t cache_info
-Print information about the caches found. This allows you to see if your target
+@*Print information about the caches found. This allows you to see if your target
is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
@item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
@cindex arm920t md<bhw>_phys
-Display memory at physical address addr.
+@*Display memory at physical address addr.
@item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
@cindex arm920t mw<bhw>_phys
-Write memory at physical address addr.
+@*Write memory at physical address addr.
@item @b{arm920t read_cache} <@var{filename}>
@cindex arm920t read_cache
-Dump the content of ICache and DCache to a file.
+@*Dump the content of ICache and DCache to a file.
@item @b{arm920t read_mmu} <@var{filename}>
@cindex arm920t read_mmu
-Dump the content of the ITLB and DTLB to a file.
-@item @b{arm920t virt2phys} <@var{VA}>
+@*Dump the content of the ITLB and DTLB to a file.
+@item @b{arm920t virt2phys} <@var{va}>
@cindex arm920t virt2phys
-Translate a virtual address to a physical address.
+@*Translate a virtual address to a physical address.
+@end itemize
+
+@subsection ARM926EJS specific commands
+@cindex ARM926EJS specific commands
+
+@itemize @bullet
+@item @b{arm926ejs cp15} <@var{num}> [@var{value}]
+@cindex arm926ejs cp15
+@*display/modify cp15 register <@option{num}> [@option{value}].
+@item @b{arm926ejs cache_info}
+@cindex arm926ejs cache_info
+@*Print information about the caches found.
+@item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
+@cindex arm926ejs md<bhw>_phys
+@*Display memory at physical address addr.
+@item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
+@cindex arm926ejs mw<bhw>_phys
+@*Write memory at physical address addr.
+@item @b{arm926ejs virt2phys} <@var{va}>
+@cindex arm926ejs virt2phys
+@*Translate a virtual address to a physical address.
@end itemize
@page
@section Debug commands
@cindex Debug commands
The following commands give direct access to the core, and are most likely
-only useful while debugging the OpenOCD.
+only useful while debugging OpenOCD.
@itemize @bullet
@item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
@cindex arm7_9 write_xpsr
-Immediately write either the current program status register (CPSR) or the saved
+@*Immediately write either the current program status register (CPSR) or the saved
program status register (SPSR), without changing the register cache (as displayed
by the @option{reg} and @option{armv4_5 reg} commands).
@item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
<@var{0=cpsr},@var{1=spsr}>
@cindex arm7_9 write_xpsr_im8
-Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
+@*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
operation (similar to @option{write_xpsr}).
@item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
@cindex arm7_9 write_core_reg
-Write a core register, without changing the register cache (as displayed by the
+@*Write a core register, without changing the register cache (as displayed by the
@option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
encoding of the [M4:M0] bits of the PSR.
@end itemize
@itemize @bullet
@item @b{scan_chain}
@cindex scan_chain
-Print current scan chain configuration.
-@item @b{jtag_reset}
+@*Print current scan chain configuration.
+@item @b{jtag_reset} <@var{trst}> <@var{srst}>
@cindex jtag_reset
-Toggle reset lines <@var{trst}> <@var{srst}>.
+@*Toggle reset lines.
@item @b{endstate} <@var{tap_state}>
@cindex endstate
-Finish JTAG operations in <@var{tap_state}>.
+@*Finish JTAG operations in <@var{tap_state}>.
@item @b{runtest} <@var{num_cycles}>
@cindex runtest
-Move to Run-Test/Idle, and execute <@var{num_cycles}>
+@*Move to Run-Test/Idle, and execute <@var{num_cycles}>
@item @b{statemove} [@var{tap_state}]
@cindex statemove
-Move to current endstate or [@var{tap_state}]
-@item @b{irscan}
+@*Move to current endstate or [@var{tap_state}]
+@item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
@cindex irscan
-Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
-@item @b{drscan}
+@*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
+@item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
@cindex drscan
-Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
-@item @b{verify_ircapture}
+@*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
+@item @b{verify_ircapture} <@option{enable}|@option{disable}>
@cindex verify_ircapture
-Verify value captured during Capture-IR <@option{enable}|@option{disable}>
-@item @b{var}
+@*Verify value captured during Capture-IR. Default is enabled.
+@item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
@cindex var
-Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
-@item @b{field}
+@*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
+@item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
@cindex field
-Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}]
+Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
+@end itemize
+
+@page
+@section Target Requests
+@cindex Target Requests
+OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
+See libdcc in the contrib dir for more details.
+@itemize @bullet
+@item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
+@cindex target_request debugmsgs
+@*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.
@end itemize
+@node TFTP
+@chapter TFTP
+@cindex TFTP
+If OpenOCD runs on an embedded host(as ZY1000 does), then tftp can
+be used to access files on PCs(either developer PC or some other PC).
+
+The way this works is to prefix a filename by "/tftp/ip/" and append
+the tftp path on the tftp server(tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf"
+will load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
+if the file was hosted on the embedded host.
+
+In order to achieve decent performance, you must choose a tftp server
+that supports a packet size bigger than the default packet size(512 bytes). There
+are numerous tftp servers out there(free and commercial) and you will have to do
+a bit of googling to find something that fits your requirements.
+
@node Sample Scripts
@chapter Sample Scripts
@cindex scripts
-This page will collect some script examples for different CPUs.
+This page shows how to use the target library.
The configuration script can be divided in the following section:
@itemize @bullet
-@item deamon configuration
+@item daemon configuration
@item interface
@item jtag scan chain
@item target configuration
@item flash configuration
@end itemize
-Detailed information about each section can be found at OpenOCD configuration
+Detailed information about each section can be found at OpenOCD configuration.
-@section OMAP5912 Flash Debug
-@cindex OMAP5912 Flash Debug
-The following two scripts was used with an wiggler PP and and a TI OMAP5912
-dual core processor (@uref{http://www.ti.com}) on a OMAP5912 OSK board
-(@uref{http://www.spectrumdigital.com}).
-@subsection Openocd config
+@section AT91R40008 example
+@cindex AT91R40008 example
+To start OpenOCD with a target script for the AT91R40008 CPU and reset
+the CPU upon startup of the OpenOCD daemon.
@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface parport
-parport_port 0x378
-parport_cable wiggler
-jtag_speed 0
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 38 0x0 0x0 0x0
-jtag_device 4 0x1 0x0 0xe
-jtag_device 8 0x0 0x0 0x0
-
-#target configuration
-daemon_startup reset
-
-#target <type> <endianness> <reset mode> <chainpos> <variant>
-target arm926ejs little run_and_init 1 arm926ejs
-target_script 0 reset omap5912_osk.init
-run_and_halt_time 0 30
-
-# omap5912 lcd frame buffer as working area
-working_area 0 0x20000000 0x3e800 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank cfi 0x00000000 0x1000000 2 2 0
+openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
@end smallexample
-@subsection Openocd init
-@smallexample
-#
-# halt target
-#
-poll
-sleep 1
-halt
-wait_halt
-#
-# disable wdt
-#
-mww 0xfffec808 0x000000f5
-mww 0xfffec808 0x000000a0
-
-mww 0xfffeb048 0x0000aaaa
-sleep 500
-mww 0xfffeb048 0x00005555
-sleep 500
-#
-# detect flash
-#
-flash probe 0
-@end smallexample
+@node GDB and OpenOCD
+@chapter GDB and OpenOCD
+@cindex GDB and OpenOCD
+OpenOCD complies with the remote gdbserver protocol, and as such can be used
+to debug remote targets.
-@section STR71x Script
-@cindex STR71x Script
-The following script was used with an Amontec JTAGkey and a STR710 / STR711 cpu:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 0
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi
-run_and_halt_time 0 30
+@section Connecting to gdb
+@cindex Connecting to gdb
+Use GDB 6.7 or newer with OpenOCD if you run into trouble. For instance 6.3 has a
+known bug where it produces bogus memory access errors, which has since
+been fixed: look up 1836 in http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb
-working_area 0 0x2000C000 0x4000 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
-@end smallexample
-@section STR750 Script
-@cindex STR750 Script
-The following script was used with an Amontec JTAGkey and a STR750 cpu:
+A connection is typically started as follows:
@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 19
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-#reset_config trst_and_srst srst_pulls_trst
-reset_config trst_and_srst srst_pulls_trst
+target remote localhost:3333
+@end smallexample
+This would cause gdb to connect to the gdbserver on the local pc using port 3333.
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
+To see a list of available OpenOCD commands type @option{monitor help} on the
+gdb commandline.
-#jtag nTRST and nSRST delay
-jtag_nsrst_delay 500
-jtag_ntrst_delay 500
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi
-run_and_halt_time 0 30
-
-working_area 0 0x40000000 0x4000 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank str7x 0x20000000 0x000040000 0 0 0 STR75x
-@end smallexample
+OpenOCD supports the gdb @option{qSupported} packet, this enables information
+to be sent by the gdb server (openocd) to gdb. Typical information includes
+packet size and device memory map.
-@section STR912 Script
-@cindex STR912 Script
-The following script was used with an Amontec JTAGkey and a STR912 cpu:
+Previous versions of OpenOCD required the following gdb options to increase
+the packet size and speed up gdb communication.
@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-jtag_speed 1
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 8 0x1 0x1 0xfe
-jtag_device 4 0x1 0xf 0xe
-jtag_device 5 0x1 0x1 0x1e
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm966e <endianness> <reset mode> <chainpos> <variant>
-target arm966e little reset_halt 1 arm966e
-run_and_halt_time 0 30
-
-working_area 0 0x50000000 16384 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank str9x 0x00000000 0x00080000 0 0 0
+set remote memory-write-packet-size 1024
+set remote memory-write-packet-size fixed
+set remote memory-read-packet-size 1024
+set remote memory-read-packet-size fixed
@end smallexample
+This is now handled in the @option{qSupported} PacketSize.
-@section STR912 comstick
-@cindex STR912 comstick Script
-The following script was used with a Hitex STR9 Comstick:
+@section Programming using gdb
+@cindex Programming using gdb
+
+By default the target memory map is sent to gdb, this can be disabled by
+the following OpenOCD config option:
@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "STR9-comStick A"
-ft2232_layout comstick
-jtag_speed 1
+gdb_memory_map disable
+@end smallexample
+For this to function correctly a valid flash config must also be configured
+in OpenOCD. For faster performance you should also configure a valid
+working area.
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
+Informing gdb of the memory map of the target will enable gdb to protect any
+flash area of the target and use hardware breakpoints by default. This means
+that the OpenOCD option @option{gdb_breakpoint_override} is not required when
+using a memory map. @xref{gdb_breakpoint_override}.
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 8 0x1 0x1 0xfe
-jtag_device 4 0x1 0xf 0xe
-jtag_device 5 0x1 0x1 0x1e
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm966e <endianness> <reset mode> <chainpos> <variant>
-target arm966e little reset_halt 1 arm966e
-run_and_halt_time 0 30
-
-working_area 0 0x50000000 16384 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank str9x 0x00000000 0x00080000 0 0 0
-@end smallexample
+To view the configured memory map in gdb, use the gdb command @option{info mem}
+All other unasigned addresses within gdb are treated as RAM.
-@section STM32x Script
-@cindex STM32x Script
-The following script was used with an Amontec JTAGkey and a STM32x cpu:
+GDB 6.8 and higher set any memory area not in the memory map as inaccessible,
+this can be changed to the old behaviour by using the following gdb command.
@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-jtag_speed 10
+set mem inaccessible-by-default off
+@end smallexample
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
+If @option{gdb_flash_program enable} is also used, gdb will be able to
+program any flash memory using the vFlash interface.
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-jtag_device 5 0x1 0x1 0x1e
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target cortex_m3 <endianness> <reset mode> <chainpos> <variant>
-target cortex_m3 little run_and_halt 0
-run_and_halt_time 0 30
-
-working_area 0 0x20000000 16384 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank stm32x 0x08000000 0x00010000 0 0 0
-@end smallexample
+gdb will look at the target memory map when a load command is given, if any
+areas to be programmed lie within the target flash area the vFlash packets
+will be used.
-@section STM32x Performance Stick
-@cindex STM32x Performance Stick Script
-The following script was used with the Hitex STM32 Performance Stick
+If the target needs configuring before gdb programming, a script can be executed.
@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "STM32-PerformanceStick A"
-ft2232_layout stm32stick
-jtag_speed 10
+target_script 0 gdb_program_config config.script
+@end smallexample
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
+To verify any flash programming the gdb command @option{compare-sections}
+can be used.
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-jtag_device 5 0x1 0x1 0x1e
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target cortex_m3 <endianness> <reset mode> <chainpos> <variant>
-target cortex_m3 little run_and_halt 0
-run_and_halt_time 0 30
-
-working_area 0 0x20000000 16384 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank stm32x 0x08000000 0x00010000 0 0 0
-@end smallexample
+@node TCL and OpenOCD
+@chapter TCL and OpenOCD
+@cindex TCL and OpenOCD
+OpenOCD embeds a TCL interpreter (see JIM) for command parsing and scripting
+support.
-@section LPC2129 Script
-@cindex LPC2129 Script
-The following script was used with an wiggler PP and a LPC-2129 cpu:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface parport
-parport_port 0x378
-parport_cable wiggler
-jtag_speed 0
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
-run_and_halt_time 0 30
-
-working_area 0 0x40000000 0x4000 nobackup
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
-@end smallexample
+The TCL interpreter can be invoked from the interactive command line, files, and a network port.
-@section LPC2148 Script
-@cindex LPC2148 Script
-The following script was used with an Amontec JTAGkey and a LPC2148 cpu:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 3
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
-run_and_halt_time 0 30
-
-working_area 0 0x40000000 0x8000 nobackup
-
-#flash configuration
-flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v1 14765 calc_checksum
-@end smallexample
+The command and file interfaces are fairly straightforward, while the network
+port is geared toward intergration with external clients. A small example
+of an external TCL script that can connect to openocd is shown below.
-@section LPC2294 Script
-@cindex LPC2294 Script
-The following script was used with an Amontec JTAGkey and a LPC2294 cpu:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 3
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
-run_and_halt_time 0 30
-
-working_area 0 0x40000000 0x4000 nobackup
-
-#flash configuration
-flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
-@end smallexample
+@verbatim
+# Simple tcl client to connect to openocd
+puts "Use empty line to exit"
+set fo [socket 127.0.0.1 6666]
+puts -nonewline stdout "> "
+flush stdout
+while {[gets stdin line] >= 0} {
+ if {$line eq {}} break
+ puts $fo $line
+ flush $fo
+ gets $fo line
+ puts $line
+ puts -nonewline stdout "> "
+ flush stdout
+}
+close $fo
+@end verbatim
-@section AT91R40008 Script
-@cindex AT91R40008 Script
-The following script was used with an Amontec JTAGkey and a AT91R40008 cpu:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 0
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi
-run_and_halt_time 0 30
-@end smallexample
+This script can easily be modified to front various GUIs or be a sub
+component of a larger framework for control and interaction.
-@section AT91SAM7s Script
-@cindex AT91SAM7s Script
-The following script was used with an Olimex ARM-JTAG-OCD and a AT91SAM7S64 cpu:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Olimex OpenOCD JTAG A"
-ft2232_layout olimex-jtag
-ft2232_vid_pid 0x15BA 0x0003
-jtag_speed 0
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi
-run_and_halt_time 0 30
-
-# flash-options AT91
-working_area 0 0x00200000 0x4000 nobackup
-flash bank at91sam7 0 0 0 0 0
-
-# Information:
-# erase command (telnet-interface) for complete flash:
-# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)
-# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15
-# set/clear NVM-Bits:
-# at91sam7 gpnvm <num> <bit> <set|clear>
-# disable locking from SAM-BA:
-# flash protect 0 0 1 off
-@end smallexample
-@section XSCALE IXP42x Script
-@cindex XSCALE IXP42x Script
-The following script was used with an Amontec JTAGkey-Tiny and a xscale ixp42x cpu:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 0
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 7 0x1 0x7f 0x7e
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
-target xscale big run_and_halt 0 IXP42x
-run_and_halt_time 0 30
-@end smallexample
+@node TCL scripting API
+@chapter TCL scripting API
+@cindex TCL scripting API
+API rules
-@section Cirrus Logic EP9301 Script
-@cindex Cirrus Logic EP9301 Script
-The following script was used with FT2232 based JTAG interfaces and a
-Cirrus Logic EP9301 processor on an Olimex CS-E9301 board.
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface ft2232
+The commands are stateless. E.g. the telnet command line has a concept
+of currently active target, the Tcl API proc's take this sort of state
+information as an argument to each proc.
-#Olimex ARM-USB-OCD
-#ft2232_device_desc "Olimex OpenOCD JTAG"
-#ft2232_layout olimex-jtag
-#ft2232_vid_pid 0x15ba 0x0003
-
-#Amontec JTAGkey (and JTAGkey-Tiny)
-#Serial is only necessary if more than one JTAGkey is connected
-ft2232_device_desc "Amontec JTAGkey A"
-#ft2232_serial AMTJKV31
-#ft2232_serial T1P3S2W8
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-
-#wiggler/parallel port interface
-#interface parport
-#parport_port 0x378
-#parport_cable wiggler
-#jtag_speed 0
-jtag_speed 1
-reset_config trst_and_srst
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
-
-#target configuration
-daemon_startup attach
-
-#target <type> <endianess> <reset mode>
-target arm920t little reset_halt 0
-working_area 0 0x80014000 0x1000 backup
+There are three main types of return values: single value, name value
+pair list and lists.
+
+Name value pair. The proc 'foo' below returns a name/value pair
+list.
+
+@verbatim
+
+ > set foo(me) Duane
+ > set foo(you) Oyvind
+ > set foo(mouse) Micky
+ > set foo(duck) Donald
+
+If one does this:
+
+ > set foo
+
+The result is:
+
+ me Duane you Oyvind mouse Micky duck Donald
+
+Thus, to get the names of the associative array is easy:
+
+ foreach { name value } [set foo] {
+ puts "Name: $name, Value: $value"
+ }
+@end verbatim
-#flash configuration
-#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
-flash bank cfi 0x60000000 0x1000000 2 2 0
-@end smallexample
+Lists returned must be relatively small. Otherwise a range
+should be passed in to the proc in question.
-@section Hilscher netX 100 / 500 Script
-@cindex Hilscher netX 100 / 500 Script
-The following script was used with an Amontec JTAGkey and a Hilscher
-netX 500 cpu:
-@smallexample
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
+Low level commands are prefixed with "openocd_", e.g. openocd_flash_banks
+is the low level API upon which "flash banks" is implemented.
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 5
+@itemize @bullet
+@item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
+Read memory and return as a TCL array for script processing
+@item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
+Convert a TCL array to memory locations and write the values
+@item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
+Return information about the flash banks
+@end itemize
-#target configuration
-daemon_startup reset
+OpenOCD commands can consist of two words, e.g. "flash banks". The
+startup.tcl "unknown" proc will translate this into a tcl proc
+called "flash_banks".
-#target <type> <endianness> <startup mode> <chainpos> <variant>
-target arm926ejs little run_and_halt 0 arm926ejs
-run_and_halt_time 0 500
-@end smallexample
-@section Marvell/Intel PXA270 Script
-@cindex Marvell/Intel PXA270 Script
+@node Upgrading
+@chapter Deprecated/Removed Commands
+@cindex Deprecated/Removed Commands
+Certain OpenOCD commands have been deprecated/removed during the various revisions.
+
+@itemize @bullet
+@item @b{load_binary}
+@cindex load_binary
+@*use @option{load_image} command with same args. @xref{load_image}.
+@item @b{target}
+@cindex target
+@*@option{target} no longer take the reset_init, reset_run, run_and_halt, run_and_init. The @option{reset} command
+always does a @option{reset run} when passed no arguments.
+@item @b{dump_binary}
+@cindex dump_binary
+@*use @option{dump_image} command with same args. @xref{dump_image}.
+@item @b{flash erase}
+@cindex flash erase
+@*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
+@item @b{flash write}
+@cindex flash write
+@*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
+@item @b{flash write_binary}
+@cindex flash write_binary
+@*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
+@item @b{arm7_9 fast_writes}
+@cindex arm7_9 fast_writes
+@*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
+@item @b{flash auto_erase}
+@cindex flash auto_erase
+@*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
+@item @b{daemon_startup}
+@cindex daemon_startup
+@*this config option has been removed, simply adding @option{init} and @option{reset halt} to
+the end of your config script will give the same behaviour as using @option{daemon_startup reset}
+and @option{target cortex_m3 little reset_halt 0}.
+@item @b{arm7_9 sw_bkpts}
+@cindex arm7_9 sw_bkpts
+@*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
+@item @b{arm7_9 force_hw_bkpts}
+@cindex arm7_9 force_hw_bkpts
+@*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
+for flash if the gdb memory map has been set up(default when flash is declared in
+target configuration). @xref{gdb_breakpoint_override}.
+@item @b{run_and_halt_time}
+@cindex run_and_halt_time
+@*This command has been removed for simpler reset behaviour, it can be simulated with the
+following commands:
@smallexample
-# config for Intel PXA270
-# not, as of 2007-06-22, openocd only works with the
-# libftd2xx library from ftdi. libftdi does not work.
-
-telnet_port 3333
-gdb_port 4444
-
-interface ft2232
-ft2232_layout olimex-jtag
-ft2232_vid_pid 0x15BA 0x0003
-ft2232_device_desc "Olimex OpenOCD JTAG"
-jtag_speed 0
-# set jtag_nsrst_delay to the delay introduced by your reset circuit
-# the rest of the needed delays are built into the openocd program
-jtag_nsrst_delay 260
-# set the jtag_ntrst_delay to the delay introduced by a reset circuit
-# the rest of the needed delays are built into the openocd program
-jtag_ntrst_delay 0
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst separate
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 7 0x1 0x7f 0x7e
-
-#target configuration
-daemon_startup reset
-
-target xscale little reset_halt 0 pxa27x
-
-# maps to PXA internal RAM. If you are using a PXA255
-# you must initialize SDRAM or leave this option off
-working_area 0 0x5c000000 0x10000 nobackup
-
-run_and_halt_time 0 30
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-# works for P30 flash
-flash bank cfi 0x00000000 0x1000000 2 4 0
+reset run
+sleep 100
+halt
@end smallexample
+@end itemize
@node FAQ
@chapter FAQ
@cindex faq
@enumerate
-@item OpenOCD complains about a missing cygwin1.dll
+@item OpenOCD complains about a missing cygwin1.dll.
Make sure you have Cygwin installed, or at least a version of OpenOCD that
claims to come with all the necessary dlls. When using Cygwin, try launching
-the OpenOCD from the Cygwin shell.
+OpenOCD from the Cygwin shell.
@item I'm trying to set a breakpoint using GDB (or a frontend like Insight or
Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
GDB issues software breakpoints when a normal breakpoint is requested, or to implement
source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720t or ARM920t,
-software breakpoints consume one of the two available hardware breakpoints,
-and are therefor disabled by default. If your code is running from RAM, you
-can enable software breakpoints with the @option{arm7_9 sw_bkpts enable} command. If
-your code resides in Flash, you can't use software breakpoints, but you can force
-OpenOCD to use hardware breakpoints instead: @option{arm7_9 force_hw_bkpts enable}.
+software breakpoints consume one of the two available hardware breakpoints.
@item When erasing or writing LPC2000 on-chip flash, the operation fails sometimes
and works sometimes fine.
out while waiting for end of scan, rtck was disabled".
Make sure your PC's parallel port operates in EPP mode. You might have to try several
-settings in your PC Bios (ECP, EPP, and different versions of those).
+settings in your PC BIOS (ECP, EPP, and different versions of those).
-@item When debugging with the OpenOCD and GDB (plain GDB, Insight, or Eclipse),
+@item When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
memory read caused data abort".
This warning doesn't indicate any serious problem, as long as you don't want to
debug your core right out of reset. Your .cfg file specified @option{jtag_reset
-trst_and_srst srst_pulls_trst} to tell the OpenOCD that either your board,
+trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
independently. With this setup, it's not possible to halt the core right out of
reset, everything else should work fine.
unstable. When single-stepping over large blocks of code, GDB and OpenOCD
quit with an error message. Is there a stability issue with OpenOCD?
-No, this is not a stability issue concering OpenOCD. Most users have solved
-this issue by simply using a self-powered USB Hub, which they connect their
+No, this is not a stability issue concerning OpenOCD. Most users have solved
+this issue by simply using a self-powered USB hub, which they connect their
Amontec JTAGkey to. Apparently, some computers do not provide a USB power
supply stable enough for the Amontec JTAGkey to be operated.
First of all, the reason might be the USB power supply. Try using a self-powered
hub instead of a direct connection to your computer. Secondly, the error code 4
corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
-Chip ran into some sort of error - this points us to a USB problem.
+chip ran into some sort of error - this points us to a USB problem.
@item When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
@item In the configuration file in the section where flash device configurations
are described, there is a parameter for specifying the clock frequency for
LPC2000 internal flash devices (e.g.
-@option{flash bank lpc2000 0x0 0x40000 0 0 lpc2000_v1 0 14746 calc_checksum}),
-which must be sepcified in kilohertz. However, I do have a quartz crystal of a
+@option{flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}),
+which must be specified in kilohertz. However, I do have a quartz crystal of a
frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz, i.e. 14,745.600 kHz).
Is it possible to specify real numbers for the clock frequency?
@item Sometimes my debugging session terminates with an error. When I look into the
log file, I can see these error messages: Error: arm7_9_common.c:561
arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
+
+TODO.
@end enumerate
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