increase pause before reboot so web interface remains responsive when issuing a reboo...

[openocd.git] / TODO

diff --git a/TODO b/TODO
index 7301e981f8c1fc40f1d49cc1a7068560b9989522..a2ee398bfb32ee0cf49d383a8c4335044ca6a545 100644 (file)
--- a/TODO
+++ b/TODO
@@ -60,6 +60,22 @@ The following tasks have been suggested for adding new core JTAG support:
 
 @subsection thelistjtaginterfaces JTAG Interfaces
 
+There are some known bugs to fix in JTAG adapter drivers:
+
+- For JTAG_STATEMOVE to TAP_RESET, all drivers must ignore the current
+  recorded state.  The tap_get_state() call won't necessarily return
+  the correct value, especially at server startup.  Fix is easy:  in
+  that case, always issue five clocks with TMS high.
+  - amt_jtagaccel.c
+  - arm-jtag-ew.c
+  - bitbang.c
+  - bitq.c
+  - gw16012.c
+  - jlink.c
+  - usbprog.c
+  - vsllink.c
+  - rlink/rlink.c
+
 The following tasks have been suggeted for improving OpenOCD's JTAG
 interface support:
 
@@ -69,7 +85,7 @@ interface support:
 - J-Link driver:
   - fix to work with long scan chains, such as R.Doss's svf test.
 - FT2232 (libftdi):
-  - make performance comparable to alternatives
+  - make performance comparable to alternatives (on Win32, D2XX is faster)
   - make usability comparable to alternatives
 
 The following tasks have been suggested for adding new JTAG interfaces:
@@ -114,6 +130,10 @@ Once the above are completed:
   https://lists.berlios.de/pipermail/openocd-development/2009-July/009426.html
 - regression: "reset halt" between 729(works) and 788(fails): @par
 https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
+- ARM7/9:
+  - add reset option to allow programming embedded ice while srst is asserted.
+  Some CPUs will gate the JTAG clock when srst is asserted and in this case,
+  it is necessary to program embedded ice and then assert srst afterwards.
 - ARM923EJS:
   - reset run/halt/step is not robust; needs testing to map out problems.
 - ARM11 improvements (MB?)