armv8_dpm: fix registers read at debug entry

The comment above armv8_dpm_read_current_registers() doesn't match
the implementation, as the function reads all the registers from
ARMV8_PC and above.
The registers currently read are not relevant to answer to the
usual GDB initial request through the 'g' packet. Plus the lack of
differentiation per core state (AArch32 vs AArch64) causes the
read of not existing registers in AArch32 triggering errors, as
tentatively fixed by https://review.openocd.org/5517/

Fix the code to read the registers initially required by GDB.
Modify the comment to report the register list in AArch32 and in
AArch64.
Keep the extra checks inside the read loop, even if they are
mostly irrelevant; this could prevent errors if someone needs to
extend the number of registers to read.

The current implementation of the register's description in
OpenOCD does not allow to discriminate among AArch32 and AArch64
registers. Add a TODO comment to highlight it.

Change-Id: Icd47d93c19a9e1694a7b51bbc5ca7e21a578df41
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7887
Tested-by: jenkins

diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 9ba6b5453b4ab731099c06e9496f91fa2aaf8dcd..552bcfa024325a22a704fafd285df38819681d42 100644 (file)
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -725,7 +725,8 @@ static int dpmv8_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 }
 
 /**
- * Read basic registers of the current context:  R0 to R15, and CPSR;
+ * Read basic registers of the current context:  R0 to R15, and CPSR in AArch32
+ * state or R0 to R31, PC and CPSR in AArch64 state;
  * sets the core mode (such as USR or IRQ) and state (such as ARM or Thumb).
  * In normal operation this is called on entry to halting debug state,
  * possibly after some other operations supporting restore of debug state
@@ -772,9 +773,15 @@ int armv8_dpm_read_current_registers(struct arm_dpm *dpm)
        /* update core mode and state */
        armv8_set_cpsr(arm, cpsr);
 
-       for (unsigned int i = ARMV8_PC; i < cache->num_regs ; i++) {
+       /* read the remaining registers that would be required by GDB 'g' packet */
+       for (unsigned int i = ARMV8_R2; i <= ARMV8_PC ; i++) {
                struct arm_reg *arm_reg;
 
+               /* in AArch32 skip AArch64 registers */
+               /* TODO: this should be detected below through arm_reg->mode */
+               if (arm->core_state != ARM_STATE_AARCH64 && i > ARMV8_R14 && i < ARMV8_PC)
+                       continue;
+
                r = armv8_reg_current(arm, i);
                if (!r->exist || r->valid)
                        continue;