target/cortex_m: enhance multi-core examine logs 53/6553/2
authorTarek BOCHKATI <tarek.bouchkati@gmail.com>
Wed, 8 Sep 2021 11:49:50 +0000 (12:49 +0100)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sat, 2 Oct 2021 13:12:26 +0000 (13:12 +0000)
Giving the example of STM32WL55x the examine log is the following:
  Info : stm32wlx.cpu0: hardware has 6 breakpoints, 4 watchpoints
  Info : stm32wlx.cpu1: hardware has 4 breakpoints, 2 watchpoints

After this change the examine log becomes:
  Info : stm32wlx.cpu0: Cortex-M4 r0p1 processor detected
  Info : stm32wlx.cpu0: target has 6 breakpoints, 4 watchpoints
  Info : stm32wlx.cpu1: Cortex-M0+ r0p1 processor detected
  Info : stm32wlx.cpu1: target has 4 breakpoints, 2 watchpoints

Change-Id: I1873a75eb76f0819342c441129427b38e984f0df
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6553
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
src/target/cortex_m.c

index 5deb9bf4ae6c08be34a7e7ab4f38b853e156cc46..3412c567711dcbdcaf170bbfdf1f1479ed81308b 100644 (file)
@@ -2082,8 +2082,12 @@ int cortex_m_examine(struct target *target)
 
                armv7m->arm.arch = cortex_m->core_info->arch;
 
-               LOG_DEBUG("%s r%" PRId8 "p%" PRId8 " processor detected",
-                               cortex_m->core_info->name, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf));
+               LOG_INFO("%s: %s r%" PRId8 "p%" PRId8 " processor detected",
+                               target_name(target),
+                               cortex_m->core_info->name,
+                               (uint8_t)((cpuid >> 20) & 0xf),
+                               (uint8_t)((cpuid >> 0) & 0xf));
+
                cortex_m->maskints_erratum = false;
                if (core_partno == CORTEX_M7_PARTNO) {
                        uint8_t rev, patch;
@@ -2192,7 +2196,7 @@ int cortex_m_examine(struct target *target)
                cortex_m_dwt_setup(cortex_m, target);
 
                /* These hardware breakpoints only work for code in flash! */
-               LOG_INFO("%s: hardware has %d breakpoints, %d watchpoints",
+               LOG_INFO("%s: target has %d breakpoints, %d watchpoints",
                        target_name(target),
                        cortex_m->fp_num_code,
                        cortex_m->dwt_num_comp);

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)