An application often idling in real sleep mode may make a Cortex-M target
hard to access as CPU clock are gated and debug requests are responded
by WAIT ack.
Try to examine the target under reset as the last resort.
Change-Id: I7c3de39fb1e6c23b76e2a0a85ab75f23aac94c4d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7229
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
adapter->layout->api->write_debug_reg(adapter->handle, DCB_DHCSR, DBGKEY|C_DEBUGEN);
+ if (!target_was_examined(target) && !target->defer_examine
+ && srst_asserted && res == ERROR_OK) {
+ /* If the target is not examined, now under reset it is good time to retry examination */
+ LOG_TARGET_DEBUG(target, "Trying to re-examine under reset");
+ target_examine_one(target);
+ }
+
/* only set vector catch if halt is requested */
if (target->reset_halt)
adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA|VC_CORERESET);
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