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target/mips32: pracc write cp0 status register first 14/7914/17
authorWalter Ji <walter.ji@oss.cipunited.com>
Fri, 17 Nov 2023 03:27:09 +0000 (11:27 +0800)
committerAntonio Borneo <borneo.antonio@gmail.com>
Fri, 1 Dec 2023 22:21:40 +0000 (22:21 +0000)
commit15038ab51a3c5811f7ff95c1f995c6e9dfe7d3d0
treec9688f59fcb1bc7f58522d1f8fd6562d549c382etree | snapshot
parent7ac389cf47463cc35667659804d939015a4815e5commit | diff
target/mips32: pracc write cp0 status register first

When user requested a change on cp0 status register,
it may contain changes on EXL/ERL bits, and changes on
these bits could lead to differnt behaviours on writing
to other cp0 registers.

Change-Id: Ic83039988c29c06ee134226b52de943c46d19da2
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7914
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
src/target/mips32_pracc.c diff | blob | history
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