# script for stm32f3x family
+#
+# stm32 devices support both JTAG and SWD transports.
+#
+source [find target/swj-dp.tcl]
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
adapter_khz 1000
adapter_nsrst_delay 100
-jtag_ntrst_delay 100
+if {[using_jtag]} {
+ jtag_ntrst_delay 100
+}
#jtag scan chain
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
- # See STM Document RM0316
- # Section 29.6.3 - corresponds to Cortex-M4 r0p1
- set _CPUTAPID 0x4ba00477
+ if { [using_jtag] } {
+ # See STM Document RM0316
+ # Section 29.6.3 - corresponds to Cortex-M4 r0p1
+ set _CPUTAPID 0x4ba00477
+ } {
+ set _CPUTAPID 0x2ba01477
+ }
}
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID] } {
set _BSTAPID $BSTAPID
} else {
- # See STM Document RM0316
- # Section 29.6.2
- set _BSTAPID 0x06432041
+ # STM Document RM0316 rev 2 Section 30.6.2 says 0x06432041
+ # but STM32F303VCT6 rev Y has 0x06422041
+ set _BSTAPID1 0x06422041
+ set _BSTAPID2 0x06432041
+}
+
+if {[using_jtag]} {
+ swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2
}
-jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m3 reset_config sysresetreq
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}