rename some target scripts to be consistent with the rest

[openocd.git] / tcl / target / stm32.cfg

diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index 97d76789e7327dc1151ab7f4a483139822a76885..fa59e351d57506445aa6e1cbc723068af8153ad1 100644 (file)
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -21,14 +21,11 @@ if { [info exists WORKAREASIZE] } {
 }
 
 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
-jtag_khz 1000
+adapter_khz 1000
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
 #jtag scan chain
 if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
@@ -63,9 +60,7 @@ jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
 
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
-
-flash bank stm32x 0 0 0 0 $_TARGETNAME
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
-# For more information about the configuration files, take a look at:
-# openocd.texi
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME