update IXP42x target / XBA board config
[openocd.git] / tcl / target / lpc2478.cfg
index 57aa36fd0121e454d18804c11ead9808aed615a6..3b14c87d426971d076585bcba883c7e40b5a9f92 100644 (file)
@@ -6,29 +6,28 @@ if { [info exists CHIPNAME] } {
        set  _CHIPNAME lpc2478
 }
 
-if { [info exists ENDIAN] } {
-       set  _ENDIAN $ENDIAN
-} else {
-       set  _ENDIAN little
-}
-
 if { [info exists CPUTAPID ] } {
        set _CPUTAPID $CPUTAPID
 } else {
        set _CPUTAPID 0x4f1f0f0f
 }
 
+if { [info exists CCLK ] } {
+       set _CCLK $CCLK
+} else {
+    error "You must specify the CCLK that will be used for flash programming!"
+}
+
 #delays on reset lines
 adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
-# LPC2000 -> SRST causes TRST
-reset_config trst_and_srst srst_pulls_trst
+reset_config trst_and_srst
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
+target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
 
 # LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
 $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0
@@ -41,10 +40,7 @@ $_TARGETNAME configure -event reset-init {
 }
 
 # LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
-# After reset the chip uses its internal 4MHz RC oscillator.
-# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
+# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
 set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME lpc2000 0x0 0x7D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
+flash bank $_FLASHNAME lpc2000 0x0 0x7E000 0 0 $_TARGETNAME lpc2000_v2 $_CCLK calc_checksum
 
-# Try to use RCLK, if RCLK is not available use "normal" mode. 4MHz / 6 = 666kHz, so use 500.
-jtag_rclk 500

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