stm32: set default soft reset config

[openocd.git] / tcl / target / imx31.cfg

diff --git a/tcl/target/imx31.cfg b/tcl/target/imx31.cfg
index 9a2aed3222cbfec91c4074ed7c51e00489589754..b9eddd0659d185abeddd16a9b33e1524e5c66148 100644 (file)
--- a/tcl/target/imx31.cfg
+++ b/tcl/target/imx31.cfg
@@ -3,6 +3,8 @@
 
 reset_config trst_and_srst srst_gates_jtag
 
+adapter_nsrst_delay 5
+
 if { [info exists CHIPNAME] } {
    set  _CHIPNAME $CHIPNAME
 } else {
@@ -58,5 +60,9 @@ set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 
-proc power_restore {} { puts "Sensed power restore. No action." }
-proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
+proc power_restore {} { echo "Sensed power restore. No action." }
+proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." }
+
+# trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode
+etm config $_TARGETNAME 16 normal full etb
+etb config $_TARGETNAME $_CHIPNAME.etb