-#delays on reset lines
+# Use RCLK. If RCLK is not available fall back to 500kHz.
+#
+# Depending on cabling you might be able to eek this up to 2000kHz.
+jtag_rclk 500
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME lpc2148
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x4f1f0f0f
+}
+
jtag_nsrst_delay 200
jtag_ntrst_delay 200
-#use combined on interfaces or targets that can't set TRST/SRST separately
+# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
+# JTAG, power-on reset is not enough, i.e. you need to perform a
+# reset before being able to talk to the LPC2148, attach is not possible.
+
reset_config trst_and_srst srst_pulls_trst
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
-#target <type> <startup mode>
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
-target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
-run_and_halt_time 0 30
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
-working_area 0 0x40000000 0x4000 nobackup
+$_TARGETNAME configure -event reset-init {
+ # Force target into ARM state.
+ soft_reset_halt
-#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
-flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum
+ # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
+ # "User Flash Mode" where interrupt vectors are _not_ remapped,
+ # and reside in flash instead).
+ #
+ # See section 7.1 on page 32 ("Memory Mapping control register") in
+ # "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006.
+ # http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf
+ mwb 0xE01FC040 0x01
+}
-# For more information about the configuration files, take a look at:
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
+# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
+flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765