* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
+ * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "nds32_tlb.h"
#include "nds32_disassembler.h"
-const int NDS32_BREAK_16 = 0x00EA; /* 0xEA00 */
-const int NDS32_BREAK_32 = 0x0A000064; /* 0x6400000A */
-
struct nds32_edm_operation nds32_edm_ops[NDS32_EDM_OPERATION_MAX_NUM];
uint32_t nds32_edm_ops_num;
"LOAD STORE GLOBAL STOP",
};
-static const int NDS32_LM_SIZE_TABLE[16] = {
+static const int nds32_lm_size_table[16] = {
4 * 1024,
8 * 1024,
16 * 1024,
2 * 1024,
};
-static const int NDS32_LINE_SIZE_TABLE[6] = {
+static const int nds32_line_size_table[6] = {
0,
8,
16,
}
if (reg->valid) {
+ uint32_t val = buf_get_u32(reg_arch_info->value, 0, 32);
LOG_DEBUG("reading register(cached) %" PRIi32 "(%s), value: 0x%8.8" PRIx32,
- reg_arch_info->num, reg->name, reg_arch_info->value);
+ reg_arch_info->num, reg->name, val);
return ERROR_OK;
}
int mapped_regnum = nds32->register_map(nds32, reg_arch_info->num);
if (reg_arch_info->enable == false) {
- reg_arch_info->value = NDS32_REGISTER_DISABLE;
+ buf_set_u32(reg_arch_info->value, 0, 32, NDS32_REGISTER_DISABLE);
retval = ERROR_FAIL;
} else {
- if ((nds32->fpu_enable == false) &&
- (NDS32_REG_TYPE_FPU == nds32_reg_type(mapped_regnum))) {
- reg_arch_info->value = 0;
+ uint32_t val = 0;
+ if ((nds32->fpu_enable == false)
+ && (NDS32_REG_TYPE_FPU == nds32_reg_type(mapped_regnum))) {
retval = ERROR_OK;
- } else if ((nds32->audio_enable == false) &&
- (NDS32_REG_TYPE_AUMR == nds32_reg_type(mapped_regnum))) {
- reg_arch_info->value = 0;
+ } else if ((nds32->audio_enable == false)
+ && (NDS32_REG_TYPE_AUMR == nds32_reg_type(mapped_regnum))) {
retval = ERROR_OK;
} else {
- retval = aice_read_register(aice,
- mapped_regnum, &(reg_arch_info->value));
+ retval = aice_read_register(aice, mapped_regnum, &val);
}
+ buf_set_u32(reg_arch_info->value, 0, 32, val);
LOG_DEBUG("reading register %" PRIi32 "(%s), value: 0x%8.8" PRIx32,
- reg_arch_info->num, reg->name, reg_arch_info->value);
+ reg_arch_info->num, reg->name, val);
}
if (retval == ERROR_OK) {
return ERROR_OK;
if (reg_arch_info->enable == false) {
- reg_arch_info->value_64 = NDS32_REGISTER_DISABLE;
+ buf_set_u64(reg_arch_info->value, 0, 64, NDS32_REGISTER_DISABLE);
retval = ERROR_FAIL;
} else {
- if ((nds32->fpu_enable == false) &&
- ((FD0 <= reg_arch_info->num) && (reg_arch_info->num <= FD31))) {
- reg_arch_info->value_64 = 0;
+ uint64_t val = 0;
+ if ((nds32->fpu_enable == false)
+ && ((FD0 <= reg_arch_info->num) && (reg_arch_info->num <= FD31))) {
retval = ERROR_OK;
} else {
- retval = aice_read_reg_64(aice, reg_arch_info->num,
- &(reg_arch_info->value_64));
+ retval = aice_read_reg_64(aice, reg_arch_info->num, &val);
}
+ buf_set_u64(reg_arch_info->value, 0, 64, val);
}
if (retval == ERROR_OK) {
buf_set_u32(reg->value, 0, 32, 0);
} else {
buf_set_u32(reg->value, 0, 32, value);
- aice_write_register(aice, mapped_regnum, reg_arch_info->value);
+ uint32_t val = buf_get_u32(reg_arch_info->value, 0, 32);
+ aice_write_register(aice, mapped_regnum, val);
/* After set value to registers, read the value from target
* to avoid W1C inconsistency. */
- aice_read_register(aice, mapped_regnum, &(reg_arch_info->value));
+ aice_read_register(aice, mapped_regnum, &val);
+ buf_set_u32(reg_arch_info->value, 0, 32, val);
}
reg->valid = true;
reg->dirty = false;
/* update registers to take effect right now */
- if (IR0 == mapped_regnum) {
+ if (mapped_regnum == IR0) {
nds32_update_psw(nds32);
- } else if (MR0 == mapped_regnum) {
+ } else if (mapped_regnum == MR0) {
nds32_update_mmu_info(nds32);
- } else if ((MR6 == mapped_regnum) || (MR7 == mapped_regnum)) {
+ } else if ((mapped_regnum == MR6) || (mapped_regnum == MR7)) {
/* update lm information */
nds32_update_lm_info(nds32);
- } else if (MR8 == mapped_regnum) {
+ } else if (mapped_regnum == MR8) {
nds32_update_cache_info(nds32);
- } else if (FUCPR == mapped_regnum) {
+ } else if (mapped_regnum == FUCPR) {
/* update audio/fpu setting */
nds32_check_extension(nds32);
}
reg_list[i].reg_data_type = calloc(sizeof(struct reg_data_type), 1);
- if (FD0 <= reg_arch_info[i].num && reg_arch_info[i].num <= FD31) {
- reg_list[i].value = &(reg_arch_info[i].value_64);
+ if (reg_arch_info[i].num >= FD0 && reg_arch_info[i].num <= FD31) {
+ reg_list[i].value = reg_arch_info[i].value;
reg_list[i].type = &nds32_reg_access_type_64;
reg_list[i].reg_data_type->type = REG_TYPE_IEEE_DOUBLE;
reg_list[i].reg_data_type->id = "ieee_double";
reg_list[i].group = "float";
} else {
- reg_list[i].value = &(reg_arch_info[i].value);
+ reg_list[i].value = reg_arch_info[i].value;
reg_list[i].type = &nds32_reg_access_type;
reg_list[i].group = "general";
}
}
- if (R16 <= reg_arch_info[i].num && reg_arch_info[i].num <= R25)
+ if (reg_arch_info[i].num >= R16 && reg_arch_info[i].num <= R25)
reg_list[i].caller_save = true;
else
reg_list[i].caller_save = false;
reg_list[i].feature = malloc(sizeof(struct reg_feature));
- if (R0 <= reg_arch_info[i].num && reg_arch_info[i].num <= IFC_LP)
+ if (reg_arch_info[i].num >= R0 && reg_arch_info[i].num <= IFC_LP)
reg_list[i].feature->name = "org.gnu.gdb.nds32.core";
- else if (CR0 <= reg_arch_info[i].num && reg_arch_info[i].num <= SECUR0)
+ else if (reg_arch_info[i].num >= CR0 && reg_arch_info[i].num <= SECUR0)
reg_list[i].feature->name = "org.gnu.gdb.nds32.system";
- else if (D0L24 <= reg_arch_info[i].num && reg_arch_info[i].num <= CBE3)
+ else if (reg_arch_info[i].num >= D0L24 && reg_arch_info[i].num <= CBE3)
reg_list[i].feature->name = "org.gnu.gdb.nds32.audio";
- else if (FPCSR <= reg_arch_info[i].num && reg_arch_info[i].num <= FD31)
+ else if (reg_arch_info[i].num >= FPCSR && reg_arch_info[i].num <= FD31)
reg_list[i].feature->name = "org.gnu.gdb.nds32.fpu";
cache->num_regs++;
return aice_read_mem_unit(aice, address, size, count, buffer);
}
-int nds32_read_phys_memory(struct target *target, uint32_t address,
+int nds32_read_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct aice_port_s *aice = target_to_aice(target);
return aice_write_mem_unit(aice, address, size, count, buffer);
}
-int nds32_write_phys_memory(struct target *target, uint32_t address,
+int nds32_write_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct aice_port_s *aice = target_to_aice(target);
nds32->virtual_hosting ? ", virtual hosting" : "");
/* save pc value to pseudo register pc */
- struct reg *reg = register_get_by_name(target->reg_cache, "pc", 1);
+ struct reg *reg = register_get_by_name(target->reg_cache, "pc", true);
buf_set_u32(reg->value, 0, 32, value_pc);
return ERROR_OK;
misc_config->div_instruction = (value_cr4 >> 5) & 0x1;
misc_config->mac_instruction = (value_cr4 >> 6) & 0x1;
misc_config->audio_isa = (value_cr4 >> 7) & 0x3;
- misc_config->L2_cache = (value_cr4 >> 9) & 0x1;
+ misc_config->l2_cache = (value_cr4 >> 9) & 0x1;
misc_config->reduce_register = (value_cr4 >> 10) & 0x1;
misc_config->addr_24 = (value_cr4 >> 11) & 0x1;
misc_config->interruption_level = (value_cr4 >> 12) & 0x1;
break_insn = NDS32_BREAK_32;
}
- if (breakpoint->orig_instr != NULL)
- free(breakpoint->orig_instr);
+ free(breakpoint->orig_instr);
breakpoint->orig_instr = malloc(breakpoint->length);
memcpy(breakpoint->orig_instr, &data, breakpoint->length);
if (reg->valid == true) {
LOG_DEBUG("examining dirty reg: %s", reg->name);
- LOG_DEBUG("writing register %i "
- "with value 0x%8.8" PRIx32, i, buf_get_u32(reg->value, 0, 32));
+ LOG_DEBUG("writing register %d with value 0x%8.8" PRIx32,
+ i, buf_get_u32(reg->value, 0, 32));
reg_arch_info = reg->arch_info;
- if (FD0 <= reg_arch_info->num && reg_arch_info->num <= FD31)
- aice_write_reg_64(aice, reg_arch_info->num, reg_arch_info->value_64);
- else
- aice_write_register(aice, reg_arch_info->num, reg_arch_info->value);
+ if (reg_arch_info->num >= FD0 && reg_arch_info->num <= FD31) {
+ uint64_t val = buf_get_u64(reg_arch_info->value, 0, 64);
+ aice_write_reg_64(aice, reg_arch_info->num, val);
+ } else {
+ uint32_t val = buf_get_u32(reg_arch_info->value, 0, 32);
+ aice_write_register(aice, reg_arch_info->num, val);
+ }
+
reg->valid = true;
reg->dirty = false;
}
uint32_t size_index;
nds32_get_mapped_reg(nds32, MR6, &value_mr6);
size_index = (value_mr6 >> 1) & 0xF;
- nds32->memory.ilm_size = NDS32_LM_SIZE_TABLE[size_index];
+ nds32->memory.ilm_size = nds32_lm_size_table[size_index];
nds32_get_mapped_reg(nds32, MR7, &value_mr7);
size_index = (value_mr7 >> 1) & 0xF;
- nds32->memory.dlm_size = NDS32_LM_SIZE_TABLE[size_index];
+ nds32->memory.dlm_size = nds32_lm_size_table[size_index];
return ERROR_OK;
}
nds32->syscall_break.orig_instr = NULL;
nds32->syscall_break.next = NULL;
nds32->syscall_break.unique_id = 0x515CAll + target->target_number;
- nds32->syscall_break.linked_BRP = 0;
+ nds32->syscall_break.linked_brp = 0;
nds32_reg_init();
return ERROR_OK;
}
-int nds32_virtual_to_physical(struct target *target, uint32_t address, uint32_t *physical)
+int nds32_virtual_to_physical(struct target *target, target_addr_t address, target_addr_t *physical)
{
struct nds32 *nds32 = target_to_nds32(target);
return ERROR_FAIL;
}
-int nds32_cache_sync(struct target *target, uint32_t address, uint32_t length)
+int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t length)
{
struct aice_port_s *aice = target_to_aice(target);
struct nds32 *nds32 = target_to_nds32(target);
struct nds32_cache *dcache = &(nds32->memory.dcache);
struct nds32_cache *icache = &(nds32->memory.icache);
- uint32_t dcache_line_size = NDS32_LINE_SIZE_TABLE[dcache->line_size];
- uint32_t icache_line_size = NDS32_LINE_SIZE_TABLE[icache->line_size];
+ uint32_t dcache_line_size = nds32_line_size_table[dcache->line_size];
+ uint32_t icache_line_size = nds32_line_size_table[icache->line_size];
uint32_t cur_address;
int result;
uint32_t start_line, end_line;
/* (address + length - 1) / dcache_line_size */
end_line = (address + length - 1) >> (dcache->line_size + 2);
- for (cur_address = address, cur_line = start_line ;
- cur_line <= end_line ;
+ for (cur_address = address, cur_line = start_line;
+ cur_line <= end_line;
cur_address += dcache_line_size, cur_line++) {
/* D$ write back */
result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_VA_WB, cur_address);
/* (address + length - 1) / icache_line_size */
end_line = (address + length - 1) >> (icache->line_size + 2);
- for (cur_address = address, cur_line = start_line ;
- cur_line <= end_line ;
+ for (cur_address = address, cur_line = start_line;
+ cur_line <= end_line;
cur_address += icache_line_size, cur_line++) {
/* Because PSW.IT is turned off under debug exception, address MUST
* be physical address. L1I_VA_INVALIDATE uses PSW.IT to decide
* address translation or not. */
- uint32_t physical_addr;
- if (ERROR_FAIL == target->type->virt2phys(target, cur_address,
- &physical_addr))
+ target_addr_t physical_addr;
+ if (target->type->virt2phys(target, cur_address, &physical_addr) == ERROR_FAIL)
return ERROR_FAIL;
/* I$ invalidate */
}
int nds32_step(struct target *target, int current,
- uint32_t address, int handle_breakpoints)
+ target_addr_t address, int handle_breakpoints)
{
LOG_DEBUG("target->state: %s",
target_state_name(target));
address = nds32_nextpc(nds32, current, address);
- LOG_DEBUG("STEP PC %08" PRIx32 "%s", address, !current ? "!" : "");
+ LOG_DEBUG("STEP PC %08" TARGET_PRIxADDR "%s", address, !current ? "!" : "");
/** set DSSIM */
uint32_t ir14_value;
if (ERROR_OK != nds32_read_opcode(nds32, value_pc, &opcode))
return ERROR_FAIL;
- if (ERROR_OK != nds32_evaluate_opcode(nds32, opcode, value_pc,
- &instruction))
+ if (nds32_evaluate_opcode(nds32, opcode, value_pc, &instruction) != ERROR_OK)
return ERROR_FAIL;
/* hit 'break 0x7FFF' */
nds32_step_without_watchpoint(nds32);
/* before single_step, save exception address */
- if (ERROR_OK != result)
+ if (result != ERROR_OK)
return ERROR_FAIL;
target->debug_reason = DBG_REASON_WATCHPOINT;
case NDS32_DEBUG_DATA_VALUE_WATCHPOINT_IMPRECISE:
case NDS32_DEBUG_DATA_ADDR_WATCHPOINT_NEXT_PRECISE:
case NDS32_DEBUG_DATA_VALUE_WATCHPOINT_NEXT_PRECISE:
- if (ERROR_OK != nds32->get_watched_address(nds32,
- &(nds32->watched_address), reason))
+ if (nds32->get_watched_address(nds32, &(nds32->watched_address), reason) != ERROR_OK)
return ERROR_FAIL;
target->debug_reason = DBG_REASON_WATCHPOINT;
LOG_DEBUG("nds32_login");
- if (nds32->edm_passcode != NULL) {
+ if (nds32->edm_passcode) {
/* convert EDM passcode to command sequences */
passcode_length = strlen(nds32->edm_passcode);
command_sequence[0] = '\0';
if (nds32_target_state(nds32, &state) != ERROR_OK)
return ERROR_FAIL;
- if (TARGET_HALTED != state)
+ if (state != TARGET_HALTED)
/* TODO: if state == TARGET_HALTED, check ETYPE is DBGI or not */
if (ERROR_OK != aice_halt(aice))
return ERROR_FAIL;
}
int nds32_resume(struct target *target, int current,
- uint32_t address, int handle_breakpoints, int debug_execution)
+ target_addr_t address, int handle_breakpoints, int debug_execution)
{
- LOG_DEBUG("current %d address %08" PRIx32 " handle_breakpoints %d debug_execution %d",
+ LOG_DEBUG("current %d address %08" TARGET_PRIxADDR
+ " handle_breakpoints %d"
+ " debug_execution %d",
current, address, handle_breakpoints, debug_execution);
struct nds32 *nds32 = target_to_nds32(target);
address = nds32_nextpc(nds32, current, address);
- LOG_DEBUG("RESUME PC %08" PRIx32 "%s", address, !current ? "!" : "");
+ LOG_DEBUG("RESUME PC %08" TARGET_PRIxADDR "%s", address, !current ? "!" : "");
if (!debug_execution)
target_free_all_working_areas(target);
struct aice_port_s *aice = target_to_aice(target);
struct nds32_cpu_version *cpu_version = &(nds32->cpu_version);
+ /* TODO: apply hw reset signal in not examined state */
+ if (!(target_was_examined(target))) {
+ LOG_WARNING("Reset is not asserted because the target is not examined.");
+ LOG_WARNING("Use a reset button or power cycle the target.");
+ return ERROR_TARGET_NOT_EXAMINED;
+ }
+
if (target->reset_halt) {
if ((nds32->soft_reset_halt)
|| (nds32->edm.version < 0x51)
int nds32_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fileio_info)
{
/* fill syscall parameters to file-I/O info */
- if (NULL == fileio_info) {
+ if (!fileio_info) {
LOG_ERROR("Target has not initial file-I/O data structure");
return ERROR_FAIL;
}
LOG_DEBUG("hit syscall ID: 0x%" PRIx32, syscall_id);
/* free previous identifier storage */
- if (NULL != fileio_info->identifier) {
- free(fileio_info->identifier);
- fileio_info->identifier = NULL;
- }
+ free(fileio_info->identifier);
+ fileio_info->identifier = NULL;
+
+ uint32_t reg_r0, reg_r1, reg_r2;
+ nds32_get_mapped_reg(nds32, R0, ®_r0);
+ nds32_get_mapped_reg(nds32, R1, ®_r1);
+ nds32_get_mapped_reg(nds32, R2, ®_r2);
switch (syscall_id) {
case NDS32_SYSCALL_EXIT:
- fileio_info->identifier = (char *)malloc(5);
+ fileio_info->identifier = malloc(5);
sprintf(fileio_info->identifier, "exit");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+ fileio_info->param_1 = reg_r0;
break;
case NDS32_SYSCALL_OPEN:
{
uint8_t filename[256];
- fileio_info->identifier = (char *)malloc(5);
+ fileio_info->identifier = malloc(5);
sprintf(fileio_info->identifier, "open");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+ fileio_info->param_1 = reg_r0;
/* reserve fileio_info->param_2 for length of path */
- nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_3));
- nds32_get_mapped_reg(nds32, R2, &(fileio_info->param_4));
+ fileio_info->param_3 = reg_r1;
+ fileio_info->param_4 = reg_r2;
- target->type->read_buffer(target, fileio_info->param_1,
- 256, filename);
- fileio_info->param_2 = strlen((char *)filename) + 1;
+ target->type->read_buffer(target, reg_r0, 256, filename);
+ fileio_info->param_2 = strlen((char *)filename);
}
break;
case NDS32_SYSCALL_CLOSE:
- fileio_info->identifier = (char *)malloc(6);
+ fileio_info->identifier = malloc(6);
sprintf(fileio_info->identifier, "close");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+ fileio_info->param_1 = reg_r0;
break;
case NDS32_SYSCALL_READ:
- fileio_info->identifier = (char *)malloc(5);
+ fileio_info->identifier = malloc(5);
sprintf(fileio_info->identifier, "read");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
- nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_2));
- nds32_get_mapped_reg(nds32, R2, &(fileio_info->param_3));
+ fileio_info->param_1 = reg_r0;
+ fileio_info->param_2 = reg_r1;
+ fileio_info->param_3 = reg_r2;
break;
case NDS32_SYSCALL_WRITE:
- fileio_info->identifier = (char *)malloc(6);
+ fileio_info->identifier = malloc(6);
sprintf(fileio_info->identifier, "write");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
- nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_2));
- nds32_get_mapped_reg(nds32, R2, &(fileio_info->param_3));
+ fileio_info->param_1 = reg_r0;
+ fileio_info->param_2 = reg_r1;
+ fileio_info->param_3 = reg_r2;
break;
case NDS32_SYSCALL_LSEEK:
- fileio_info->identifier = (char *)malloc(6);
+ fileio_info->identifier = malloc(6);
sprintf(fileio_info->identifier, "lseek");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
- nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_2));
- nds32_get_mapped_reg(nds32, R2, &(fileio_info->param_3));
+ fileio_info->param_1 = reg_r0;
+ fileio_info->param_2 = reg_r1;
+ fileio_info->param_3 = reg_r2;
break;
case NDS32_SYSCALL_UNLINK:
{
uint8_t filename[256];
- fileio_info->identifier = (char *)malloc(7);
+ fileio_info->identifier = malloc(7);
sprintf(fileio_info->identifier, "unlink");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+ fileio_info->param_1 = reg_r0;
/* reserve fileio_info->param_2 for length of path */
- target->type->read_buffer(target, fileio_info->param_1,
- 256, filename);
- fileio_info->param_2 = strlen((char *)filename) + 1;
+ target->type->read_buffer(target, reg_r0, 256, filename);
+ fileio_info->param_2 = strlen((char *)filename);
}
break;
case NDS32_SYSCALL_RENAME:
{
uint8_t filename[256];
- fileio_info->identifier = (char *)malloc(7);
+ fileio_info->identifier = malloc(7);
sprintf(fileio_info->identifier, "rename");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+ fileio_info->param_1 = reg_r0;
/* reserve fileio_info->param_2 for length of old path */
- nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_3));
+ fileio_info->param_3 = reg_r1;
/* reserve fileio_info->param_4 for length of new path */
- target->type->read_buffer(target, fileio_info->param_1,
- 256, filename);
- fileio_info->param_2 = strlen((char *)filename) + 1;
+ target->type->read_buffer(target, reg_r0, 256, filename);
+ fileio_info->param_2 = strlen((char *)filename);
- target->type->read_buffer(target, fileio_info->param_3,
- 256, filename);
- fileio_info->param_4 = strlen((char *)filename) + 1;
+ target->type->read_buffer(target, reg_r1, 256, filename);
+ fileio_info->param_4 = strlen((char *)filename);
}
break;
case NDS32_SYSCALL_FSTAT:
- fileio_info->identifier = (char *)malloc(6);
+ fileio_info->identifier = malloc(6);
sprintf(fileio_info->identifier, "fstat");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
- nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_2));
+ fileio_info->param_1 = reg_r0;
+ fileio_info->param_2 = reg_r1;
break;
case NDS32_SYSCALL_STAT:
{
uint8_t filename[256];
- fileio_info->identifier = (char *)malloc(5);
+ fileio_info->identifier = malloc(5);
sprintf(fileio_info->identifier, "stat");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+ fileio_info->param_1 = reg_r0;
/* reserve fileio_info->param_2 for length of old path */
- nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_3));
+ fileio_info->param_3 = reg_r1;
- target->type->read_buffer(target, fileio_info->param_1,
- 256, filename);
+ target->type->read_buffer(target, reg_r0, 256, filename);
fileio_info->param_2 = strlen((char *)filename) + 1;
}
break;
case NDS32_SYSCALL_GETTIMEOFDAY:
- fileio_info->identifier = (char *)malloc(13);
+ fileio_info->identifier = malloc(13);
sprintf(fileio_info->identifier, "gettimeofday");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
- nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_2));
+ fileio_info->param_1 = reg_r0;
+ fileio_info->param_2 = reg_r1;
break;
case NDS32_SYSCALL_ISATTY:
- fileio_info->identifier = (char *)malloc(7);
+ fileio_info->identifier = malloc(7);
sprintf(fileio_info->identifier, "isatty");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+ fileio_info->param_1 = reg_r0;
break;
case NDS32_SYSCALL_SYSTEM:
{
uint8_t command[256];
- fileio_info->identifier = (char *)malloc(7);
+ fileio_info->identifier = malloc(7);
sprintf(fileio_info->identifier, "system");
- nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+ fileio_info->param_1 = reg_r0;
/* reserve fileio_info->param_2 for length of old path */
- target->type->read_buffer(target, fileio_info->param_1,
- 256, command);
- fileio_info->param_2 = strlen((char *)command) + 1;
+ target->type->read_buffer(target, reg_r0, 256, command);
+ fileio_info->param_2 = strlen((char *)command);
}
break;
case NDS32_SYSCALL_ERRNO:
- fileio_info->identifier = (char *)malloc(6);
+ fileio_info->identifier = malloc(6);
sprintf(fileio_info->identifier, "errno");
nds32_set_mapped_reg(nds32, R0, nds32->virtual_hosting_errno);
break;
default:
- fileio_info->identifier = (char *)malloc(8);
+ fileio_info->identifier = malloc(8);
sprintf(fileio_info->identifier, "unknown");
break;
}
int nds32_gdb_fileio_end(struct target *target, int retcode, int fileio_errno, bool ctrl_c)
{
- LOG_DEBUG("syscall return code: 0x%x, errno: 0x%x, ctrl_c: %s",
+ LOG_DEBUG("syscall return code: 0x%x, errno: 0x%x , ctrl_c: %s",
retcode, fileio_errno, ctrl_c ? "true" : "false");
struct nds32 *nds32 = target_to_nds32(target);
struct aice_port_s *aice = target_to_aice(target);
struct nds32 *nds32 = target_to_nds32(target);
+ /* REVISIT: can nds32 profile without halting? */
+ if (target->state != TARGET_HALTED) {
+ LOG_WARNING("target %s is not halted (profiling)", target->cmd_name);
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
if (max_num_samples < iteration)
iteration = max_num_samples;
Code Review / openocd.git / blobdiff