revert to 1775. 1790 causes SEGFAULT w/Cygwin.

[openocd.git] / src / target / mips32.h

diff --git a/src/target/mips32.h b/src/target/mips32.h
index 7a4dd5e6814b37dad788a3768b1e07521eaa42bc..56c33faa9ba493dd1e5868b1ee02419280219916 100644 (file)
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -25,9 +25,9 @@
 
 #include "target.h"
 #include "register.h"
-#include "mips_ejtag.h"
 #include "mips32_pracc.h"
 
+
 #define MIPS32_COMMON_MAGIC            0xB320B320
 
 /* offsets into mips32 core register cache */
@@ -69,7 +69,7 @@ typedef struct mips32_common_s
 typedef struct mips32_core_reg_s
 {
        u32 num;
-       target_t *target;
+       struct target_s *target;
        mips32_common_t *mips32_common;
 } mips32_core_reg_t;
 
@@ -94,7 +94,7 @@ typedef struct mips32_core_reg_s
 #define MIPS32_COP0_MF 0x00
 #define MIPS32_COP0_MT 0x04
 
-#define MIPS32_R_INST(opcode, rs, rt, rd, shamt, funct)        (((opcode)<<26) |((rs)<<21)|((rt)<<16)|((rd)<<11)| ((shamt)<<5) | (funct))
+#define MIPS32_R_INST(opcode, rs, rt, rd, shamt, funct)        (((opcode)<<26) |((rs)<<21)|((rt)<<16)|((rd)<<11)| ((shamt)<<6) | (funct))
 #define MIPS32_I_INST(opcode, rs, rt, immd)    (((opcode)<<26) |((rs)<<21)|((rt)<<16)|(immd))
 #define MIPS32_J_INST(opcode, addr)    (((opcode)<<26) |(addr))
 
@@ -112,8 +112,8 @@ typedef struct mips32_core_reg_s
 #define MIPS32_LW(reg, off, base)      MIPS32_I_INST(MIPS32_OP_LW, base, reg, off)
 #define MIPS32_MFLO(reg)                       MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MFLO)
 #define MIPS32_MFHI(reg)                       MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MFHI)
-#define MIPS32_MTLO(reg)                       MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MTLO)
-#define MIPS32_MTHI(reg)                       MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MTHI)
+#define MIPS32_MTLO(reg)                       MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_MTLO)
+#define MIPS32_MTHI(reg)                       MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_MTHI)
 #define MIPS32_ORI(src, tar, val)      MIPS32_I_INST(MIPS32_OP_ORI, src, tar, val)
 #define MIPS32_SB(reg, off, base)      MIPS32_I_INST(MIPS32_OP_SB, base, reg, off)
 #define MIPS32_SH(reg, off, base)      MIPS32_I_INST(MIPS32_OP_SH, base, reg, off)