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target: use bool for backup_working_area
[openocd.git] / src / target / lakemont.c
diff --git a/src/target/lakemont.c b/src/target/lakemont.c
index e3f331d13ad950ee03c46214312ff4a4e3e5a914..6c0964bfaa2ee3eaf11c0c40170fbf1907506778 100644 (file)
--- a/src/target/lakemont.c
+++ b/src/target/lakemont.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
 /*
  * Copyright(c) 2013-2016 Intel Corporation.
  *
@@ -8,19 +10,6 @@
  * Jeffrey Maxwell (jeffrey.r.maxwell@intel.com)
  * Jessica Gomez (jessica.gomez.hernandez@intel.com)
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- *
  * Contact Information:
  * Intel Corporation
  */
@@ -84,26 +73,26 @@ static const struct {
        const char *feature;
 } regs[] = {
        /* general purpose registers */
-       { EAX, "eax", 0x000000D01D660000, 0, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
-       { ECX, "ecx", 0x000000501D660000, 1, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
-       { EDX, "edx", 0x000000901D660000, 2, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
-       { EBX, "ebx", 0x000000101D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
-       { ESP, "esp", 0x000000E01D660000, NOT_PMREG, 32, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.i386.core" },
-       { EBP, "ebp", 0x000000601D660000, NOT_PMREG, 32, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.i386.core" },
-       { ESI, "esi", 0x000000A01D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
-       { EDI, "edi", 0x000000201D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { EAX, "eax", 0x000000D01D660000ULL, 0, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { ECX, "ecx", 0x000000501D660000ULL, 1, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { EDX, "edx", 0x000000901D660000ULL, 2, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { EBX, "ebx", 0x000000101D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { ESP, "esp", 0x000000E01D660000ULL, NOT_PMREG, 32, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.i386.core" },
+       { EBP, "ebp", 0x000000601D660000ULL, NOT_PMREG, 32, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.i386.core" },
+       { ESI, "esi", 0x000000A01D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { EDI, "edi", 0x000000201D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
 
        /* instruction pointer & flags */
-       { EIP, "eip", 0x000000C01D660000, 3, 32, REG_TYPE_CODE_PTR, "general", "org.gnu.gdb.i386.core" },
-       { EFLAGS, "eflags", 0x000000401D660000, 4, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { EIP, "eip", 0x000000C01D660000ULL, 3, 32, REG_TYPE_CODE_PTR, "general", "org.gnu.gdb.i386.core" },
+       { EFLAGS, "eflags", 0x000000401D660000ULL, 4, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
 
        /* segment registers */
-       { CS, "cs", 0x000000281D660000, 5, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
-       { SS, "ss", 0x000000C81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
-       { DS, "ds", 0x000000481D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
-       { ES, "es", 0x000000A81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
-       { FS, "fs", 0x000000881D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
-       { GS, "gs", 0x000000081D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { CS, "cs", 0x000000281D660000ULL, 5, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { SS, "ss", 0x000000C81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { DS, "ds", 0x000000481D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { ES, "es", 0x000000A81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { FS, "fs", 0x000000881D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
+       { GS, "gs", 0x000000081D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
 
        /* floating point unit registers - not accessible via JTAG - here to satisfy GDB */
        { ST0, "st0", 0x0, NOT_AVAIL_REG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
@@ -124,56 +113,56 @@ static const struct {
        { FOP, "fop", 0x0, NOT_AVAIL_REG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.core" },
 
        /* control registers */
-       { CR0, "cr0", 0x000000001D660000, 6, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { CR2, "cr2", 0x000000BC1D660000, 7, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { CR3, "cr3", 0x000000801D660000, 8, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { CR4, "cr4", 0x0000002C1D660000, 9, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { CR0, "cr0", 0x000000001D660000ULL, 6, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { CR2, "cr2", 0x000000BC1D660000ULL, 7, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { CR3, "cr3", 0x000000801D660000ULL, 8, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { CR4, "cr4", 0x0000002C1D660000ULL, 9, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
 
        /* debug registers */
-       { DR0, "dr0", 0x0000007C1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { DR1, "dr1", 0x000000FC1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { DR2, "dr2", 0x000000021D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { DR3, "dr3", 0x000000821D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { DR6, "dr6", 0x000000301D660000, 10, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { DR7, "dr7", 0x000000B01D660000, 11, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { DR0, "dr0", 0x0000007C1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { DR1, "dr1", 0x000000FC1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { DR2, "dr2", 0x000000021D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { DR3, "dr3", 0x000000821D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { DR6, "dr6", 0x000000301D660000ULL, 10, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { DR7, "dr7", 0x000000B01D660000ULL, 11, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
 
        /* descriptor tables */
-       { IDTB, "idtbase", 0x000000581D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { IDTL, "idtlimit", 0x000000D81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { IDTAR, "idtar", 0x000000981D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { GDTB, "gdtbase", 0x000000B81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { GDTL, "gdtlimit", 0x000000781D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { GDTAR, "gdtar", 0x000000381D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { TR, "tr", 0x000000701D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { LDTR, "ldtr", 0x000000F01D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { LDTB, "ldbase", 0x000000041D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { LDTL, "ldlimit", 0x000000841D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { LDTAR, "ldtar", 0x000000F81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { IDTB, "idtbase", 0x000000581D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { IDTL, "idtlimit", 0x000000D81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { IDTAR, "idtar", 0x000000981D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { GDTB, "gdtbase", 0x000000B81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { GDTL, "gdtlimit", 0x000000781D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { GDTAR, "gdtar", 0x000000381D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { TR, "tr", 0x000000701D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { LDTR, "ldtr", 0x000000F01D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { LDTB, "ldbase", 0x000000041D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { LDTL, "ldlimit", 0x000000841D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { LDTAR, "ldtar", 0x000000F81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
 
        /* segment registers */
-       { CSB, "csbase", 0x000000F41D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { CSL, "cslimit", 0x0000000C1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { CSAR, "csar", 0x000000741D660000, 12, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { DSB, "dsbase", 0x000000941D660000, 13, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { DSL, "dslimit", 0x000000541D660000, 14, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { DSAR, "dsar", 0x000000141D660000, 15, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { ESB, "esbase", 0x0000004C1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { ESL, "eslimit", 0x000000CC1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { ESAR, "esar", 0x0000008C1D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { FSB, "fsbase", 0x000000641D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { FSL, "fslimit", 0x000000E41D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { FSAR, "fsar", 0x000000A41D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { GSB, "gsbase", 0x000000C41D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { GSL, "gslimit", 0x000000241D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { GSAR, "gsar", 0x000000441D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { SSB, "ssbase", 0x000000341D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { SSL, "sslimit", 0x000000B41D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { SSAR, "ssar", 0x000000D41D660000, 16, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { TSSB, "tssbase", 0x000000E81D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { TSSL, "tsslimit", 0x000000181D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
-       { TSSAR, "tssar", 0x000000681D660000, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { CSB, "csbase", 0x000000F41D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { CSL, "cslimit", 0x0000000C1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { CSAR, "csar", 0x000000741D660000ULL, 12, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { DSB, "dsbase", 0x000000941D660000ULL, 13, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { DSL, "dslimit", 0x000000541D660000ULL, 14, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { DSAR, "dsar", 0x000000141D660000ULL, 15, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { ESB, "esbase", 0x0000004C1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { ESL, "eslimit", 0x000000CC1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { ESAR, "esar", 0x0000008C1D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { FSB, "fsbase", 0x000000641D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { FSL, "fslimit", 0x000000E41D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { FSAR, "fsar", 0x000000A41D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { GSB, "gsbase", 0x000000C41D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { GSL, "gslimit", 0x000000241D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { GSAR, "gsar", 0x000000441D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { SSB, "ssbase", 0x000000341D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { SSL, "sslimit", 0x000000B41D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { SSAR, "ssar", 0x000000D41D660000ULL, 16, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { TSSB, "tssbase", 0x000000E81D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { TSSL, "tsslimit", 0x000000181D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { TSSAR, "tssar", 0x000000681D660000ULL, NOT_PMREG, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
        /* probemode control register */
-       { PMCR, "pmcr", 0x000000421D660000, 17, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
+       { PMCR, "pmcr", 0x000000421D660000ULL, 17, 32, REG_TYPE_INT32, "general", "org.gnu.gdb.i386.sys" },
 };
 
 static const struct {
@@ -182,36 +171,36 @@ static const struct {
        uint64_t op;
 } instructions[] = {
        /* memory read/write */
-       { MEMRDB32, "MEMRDB32", 0x0909090909090851 },
-       { MEMRDB16, "MEMRDB16", 0x09090909090851E6 },
-       { MEMRDH32, "MEMRDH32", 0x090909090908D166 },
-       { MEMRDH16, "MEMRDH16", 0x090909090908D1E6 },
-       { MEMRDW32, "MEMRDW32", 0x09090909090908D1 },
-       { MEMRDW16, "MEMRDW16", 0x0909090908D1E666 },
-       { MEMWRB32, "MEMWRB32", 0x0909090909090811 },
-       { MEMWRB16, "MEMWRB16", 0x09090909090811E6 },
-       { MEMWRH32, "MEMWRH32", 0x0909090909089166 },
-       { MEMWRH16, "MEMWRH16", 0x09090909090891E6 },
-       { MEMWRW32, "MEMWRW32", 0x0909090909090891 },
-       { MEMWRW16, "MEMWRW16", 0x090909090891E666 },
+       { MEMRDB32, "MEMRDB32", 0x0909090909090851ULL },
+       { MEMRDB16, "MEMRDB16", 0x09090909090851E6ULL },
+       { MEMRDH32, "MEMRDH32", 0x090909090908D166ULL },
+       { MEMRDH16, "MEMRDH16", 0x090909090908D1E6ULL },
+       { MEMRDW32, "MEMRDW32", 0x09090909090908D1ULL },
+       { MEMRDW16, "MEMRDW16", 0x0909090908D1E666ULL },
+       { MEMWRB32, "MEMWRB32", 0x0909090909090811ULL },
+       { MEMWRB16, "MEMWRB16", 0x09090909090811E6ULL },
+       { MEMWRH32, "MEMWRH32", 0x0909090909089166ULL },
+       { MEMWRH16, "MEMWRH16", 0x09090909090891E6ULL },
+       { MEMWRW32, "MEMWRW32", 0x0909090909090891ULL },
+       { MEMWRW16, "MEMWRW16", 0x090909090891E666ULL },
        /* IO read/write */
-       { IORDB32, "IORDB32", 0x0909090909090937 },
-       { IORDB16, "IORDB16", 0x09090909090937E6 },
-       { IORDH32, "IORDH32", 0x090909090909B766 },
-       { IORDH16, "IORDH16", 0x090909090909B7E6 },
-       { IORDW32, "IORDW32", 0x09090909090909B7 },
-       { IORDW16, "IORDW16", 0x0909090909B7E666 },
-       { IOWRB32, "IOWRB32", 0x0909090909090977 },
-       { IOWRB16, "IOWRB16", 0x09090909090977E6 },
-       { IOWRH32, "IOWRH32", 0x090909090909F766 },
-       { IOWRH16, "IOWRH16", 0x090909090909F7E6 },
-       { IOWRW32, "IOWRW32", 0x09090909090909F7 },
-       { IOWRW16, "IOWRW16", 0x0909090909F7E666 },
+       { IORDB32, "IORDB32", 0x0909090909090937ULL },
+       { IORDB16, "IORDB16", 0x09090909090937E6ULL },
+       { IORDH32, "IORDH32", 0x090909090909B766ULL },
+       { IORDH16, "IORDH16", 0x090909090909B7E6ULL },
+       { IORDW32, "IORDW32", 0x09090909090909B7ULL },
+       { IORDW16, "IORDW16", 0x0909090909B7E666ULL },
+       { IOWRB32, "IOWRB32", 0x0909090909090977ULL },
+       { IOWRB16, "IOWRB16", 0x09090909090977E6ULL },
+       { IOWRH32, "IOWRH32", 0x090909090909F766ULL },
+       { IOWRH16, "IOWRH16", 0x090909090909F7E6ULL },
+       { IOWRW32, "IOWRW32", 0x09090909090909F7ULL },
+       { IOWRW16, "IOWRW16", 0x0909090909F7E666ULL },
        /* lakemont1 core shadow ram access opcodes */
-       { SRAMACCESS, "SRAMACCESS", 0x0000000E9D660000 },
-       { SRAM2PDR, "SRAM2PDR", 0x4CF0000000000000 },
-       { PDR2SRAM, "PDR2SRAM", 0x0CF0000000000000 },
-       { WBINVD, "WBINVD", 0x09090909090990F0 },
+       { SRAMACCESS, "SRAMACCESS", 0x0000000E9D660000ULL },
+       { SRAM2PDR, "SRAM2PDR", 0x4CF0000000000000ULL },
+       { PDR2SRAM, "PDR2SRAM", 0x0CF0000000000000ULL },
+       { WBINVD, "WBINVD", 0x09090909090990F0ULL },
 };
 
 bool check_not_halted(const struct target *t)
@@ -381,7 +370,7 @@ struct reg_cache *lakemont_build_reg_cache(struct target *t)
        struct reg_feature *feature;
        int i;
 
-       if (cache == NULL || reg_list == NULL || arch_info == NULL) {
+       if (!cache || !reg_list || !arch_info) {
                free(cache);
                free(reg_list);
                free(arch_info);
@@ -611,7 +600,7 @@ static int read_all_core_hw_regs(struct target *t)
        unsigned i;
        struct x86_32_common *x86_32 = target_to_x86_32(t);
        for (i = 0; i < (x86_32->cache->num_regs); i++) {
-               if (NOT_AVAIL_REG == regs[i].pm_idx)
+               if (regs[i].pm_idx == NOT_AVAIL_REG)
                        continue;
                err = read_hw_reg(t, regs[i].id, &regval, 1);
                if (err != ERROR_OK) {
@@ -630,7 +619,7 @@ static int write_all_core_hw_regs(struct target *t)
        unsigned i;
        struct x86_32_common *x86_32 = target_to_x86_32(t);
        for (i = 0; i < (x86_32->cache->num_regs); i++) {
-               if (NOT_AVAIL_REG == regs[i].pm_idx)
+               if (regs[i].pm_idx == NOT_AVAIL_REG)
                        continue;
                err = write_hw_reg(t, i, 0, 1);
                if (err != ERROR_OK) {
@@ -1013,7 +1002,7 @@ int lakemont_resume(struct target *t, int current, target_addr_t address,
                /* running away for a software breakpoint needs some special handling */
                uint32_t eip = buf_get_u32(x86_32->cache->reg_list[EIP].value, 0, 32);
                bp = breakpoint_find(t, eip);
-               if (bp != NULL /*&& bp->type == BKPT_SOFT*/) {
+               if (bp /*&& bp->type == BKPT_SOFT*/) {
                        /* the step will step over the breakpoint */
                        if (lakemont_step(t, 0, 0, 1) != ERROR_OK) {
                                LOG_ERROR("%s stepping over a software breakpoint at 0x%08" PRIx32 " "
@@ -1024,12 +1013,12 @@ int lakemont_resume(struct target *t, int current, target_addr_t address,
 
                /* if breakpoints are enabled, we need to redirect these into probe mode */
                struct breakpoint *activeswbp = t->breakpoints;
-               while (activeswbp != NULL && activeswbp->set == 0)
+               while (activeswbp && !activeswbp->is_set)
                        activeswbp = activeswbp->next;
                struct watchpoint *activehwbp = t->watchpoints;
-               while (activehwbp != NULL && activehwbp->set == 0)
+               while (activehwbp && !activehwbp->is_set)
                        activehwbp = activehwbp->next;
-               if (activeswbp != NULL || activehwbp != NULL)
+               if (activeswbp || activehwbp)
                        buf_set_u32(x86_32->cache->reg_list[PMCR].value, 0, 32, 1);
                if (do_resume(t) != ERROR_OK)
                        return ERROR_FAIL;
@@ -1054,7 +1043,7 @@ int lakemont_step(struct target *t, int current,
        if (check_not_halted(t))
                return ERROR_TARGET_NOT_HALTED;
        bp = breakpoint_find(t, eip);
-       if (retval == ERROR_OK && bp != NULL/*&& bp->type == BKPT_SOFT*/) {
+       if (retval == ERROR_OK && bp/*&& bp->type == BKPT_SOFT*/) {
                /* TODO: This should only be done for software breakpoints.
                 * Stepping from hardware breakpoints should be possible with the resume flag
                 * Needs testing.
@@ -1070,7 +1059,8 @@ int lakemont_step(struct target *t, int current,
        LOG_DEBUG("EFLAGS [TF] [RF] bits set=0x%08" PRIx32 ", PMCR=0x%08" PRIx32 ", EIP=0x%08" PRIx32,
                        eflags, pmcr, eip);
 
-       tapstatus = get_tapstatus(t);
+       /* Returned value unused. Can this line be removed? */
+       get_tapstatus(t);
 
        t->debug_reason = DBG_REASON_SINGLESTEP;
        t->state = TARGET_DEBUG_RUNNING;
@@ -1105,7 +1095,7 @@ int lakemont_step(struct target *t, int current,
        /* try to re-apply the breakpoint, even of step failed
         * TODO: When a bp was set, we should try to stop the target - fix the return above
         */
-       if (bp != NULL/*&& bp->type == BKPT_SOFT*/) {
+       if (bp/*&& bp->type == BKPT_SOFT*/) {
                /* TODO: This should only be done for software breakpoints.
                 * Stepping from hardware breakpoints should be possible with the resume flag
                 * Needs testing.
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