target/aarch64: Add watchpoint support

[openocd.git] / src / target / dsp563xx.c

diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index ef7a31aa65cc928727426acd2070dc5f434e24a6..b825429e0b18ab50262dea954c4ecea66048ca94 100644 (file)
--- a/src/target/dsp563xx.c
+++ b/src/target/dsp563xx.c
@@ -322,7 +322,7 @@ enum watchpoint_condition {
 #define INSTR_JUMP      0x0AF080
 /* Effective Addressing Mode Encoding */
 #define EAME_R0         0x10
-/* instrcution encoder */
+/* instruction encoder */
 /* movep
  * s - peripheral space X/Y (X=0,Y=1)
  * w - write/read
@@ -475,6 +475,7 @@ static void dsp563xx_build_reg_cache(struct target *target)
                reg_list[i].value = calloc(1, 4);
                reg_list[i].dirty = false;
                reg_list[i].valid = false;
+               reg_list[i].exist = true;
                reg_list[i].type = &dsp563xx_reg_type;
                reg_list[i].arch_info = &arch_info[i];
        }
@@ -936,7 +937,7 @@ static int dsp563xx_examine(struct target *target)
                if (((chip>>5)&0x1f) == 0)
                        chip += 300;
 
-               LOG_INFO("DSP56%03" PRId32 " device found", chip);
+               LOG_INFO("DSP56%03" PRIu32 " device found", chip);
 
                /* Clear all breakpoints */
                dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OBCR, 0);
@@ -1358,7 +1359,7 @@ static int dsp563xx_deassert_reset(struct target *target)
                if (target->state == TARGET_HALTED) {
                        /* after a reset the cpu jmp to the
                         * reset vector and need 2 cycles to fill
-                        * the cache (fetch,decode,excecute)
+                        * the cache (fetch,decode,execute)
                         */
                        err = dsp563xx_step_ex(target, 1, 0, 1, 1);
                        if (err != ERROR_OK)