cortex_m: support control.FPCA

[openocd.git] / src / target / cortex_m.c

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 4b0ea50ccc9402257f84a096859cafd9472bfa42..abc377f0dc31b699999dadba8a285e6e863c7171 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -541,7 +541,7 @@ static int cortex_m_debug_entry(struct target *target)
                arm->map = armv7m_msp_reg_map;
        } else {
                unsigned control = buf_get_u32(arm->core_cache
-                               ->reg_list[ARMV7M_CONTROL].value, 0, 2);
+                               ->reg_list[ARMV7M_CONTROL].value, 0, 3);
 
                /* is this thread privileged? */
                arm->core_mode = control & 1
@@ -1678,7 +1678,7 @@ static int cortex_m_load_core_reg_u32(struct target *target,
                                        break;
 
                                case ARMV7M_CONTROL:
-                                       *value = buf_get_u32((uint8_t *)value, 24, 2);
+                                       *value = buf_get_u32((uint8_t *)value, 24, 3);
                                        break;
                        }
 
@@ -1764,7 +1764,7 @@ static int cortex_m_store_core_reg_u32(struct target *target,
                                        break;
 
                                case ARMV7M_CONTROL:
-                                       buf_set_u32((uint8_t *)&reg, 24, 2, value);
+                                       buf_set_u32((uint8_t *)&reg, 24, 3, value);
                                        break;
                        }
 
@@ -2176,11 +2176,15 @@ int cortex_m_examine(struct target *target)
                        case CORTEX_M23_PARTNO:
                                i = 23;
                                break;
-
                        case CORTEX_M33_PARTNO:
                                i = 33;
                                break;
-
+                       case CORTEX_M35P_PARTNO:
+                               i = 35;
+                               break;
+                       case CORTEX_M55_PARTNO:
+                               i = 55;
+                               break;
                        default:
                                armv7m->arm.is_armv8m = false;
                                break;
@@ -2213,7 +2217,7 @@ int cortex_m_examine(struct target *target)
                                LOG_DEBUG("Cortex-M%d floating point feature FPv4_SP found", i);
                                armv7m->fp_feature = FPv4_SP;
                        }
-               } else if (i == 7 || i == 33) {
+               } else if (i == 7 || i == 33 || i == 35 || i == 55) {
                        target_read_u32(target, MVFR0, &mvfr0);
                        target_read_u32(target, MVFR1, &mvfr1);
 
@@ -2498,6 +2502,11 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command)
        if (retval != ERROR_OK)
                return retval;
 
+       if (!target_was_examined(target)) {
+               LOG_ERROR("Target not examined yet");
+               return ERROR_FAIL;
+       }
+
        retval = mem_ap_read_atomic_u32(armv7m->debug_ap, DCB_DEMCR, &demcr);
        if (retval != ERROR_OK)
                return retval;